arm/dts/keystone-k2l-clocks.dtsi

2  * Copyright 2013-2014 Texas Instruments, Inc.
11 clocks {
13 		#clock-cells = <0>;
14 		compatible = "ti,keystone,pll-clock";
15 		clocks = <&refclksys>;
16 		clock-output-names = "arm-pll-clk";
18 		reg-names = "control";
22 		#clock-cells = <0>;
23 		compatible = "ti,keystone,main-pll-clock";
24 		clocks = <&refclksys>;
26 		reg-names = "control", "multiplier", "post-divider";
30 		#clock-cells = <0>;
31 		compatible = "ti,keystone,pll-clock";
32 		clocks = <&refclksys>;
33 		clock-output-names = "papllclk";
35 		reg-names = "control";
39 		#clock-cells = <0>;
40 		compatible = "ti,keystone,pll-clock";
41 		clocks = <&refclksys>;
42 		clock-output-names = "ddr-3a-pll-clk";
44 		reg-names = "control";
48 		#clock-cells = <0>;
49 		compatible = "ti,keystone,psc-clock";
50 		clocks = <&chipclk12>;
51 		clock-output-names = "dfe";
52 		reg-names = "control", "domain";
54 		domain-id = <0>;
58 		#clock-cells = <0>;
59 		compatible = "ti,keystone,psc-clock";
60 		clocks = <&chipclk12>;
61 		clock-output-names = "pcie";
63 		reg-names = "control", "domain";
64 		domain-id = <4>;
68 		#clock-cells = <0>;
69 		compatible = "ti,keystone,psc-clock";
70 		clocks = <&chipclk1>;
71 		clock-output-names = "gem1";
73 		reg-names = "control", "domain";
74 		domain-id = <9>;
78 		#clock-cells = <0>;
79 		compatible = "ti,keystone,psc-clock";
80 		clocks = <&chipclk1>;
81 		clock-output-names = "gem2";
83 		reg-names = "control", "domain";
84 		domain-id = <10>;
88 		#clock-cells = <0>;
89 		compatible = "ti,keystone,psc-clock";
90 		clocks = <&chipclk1>;
91 		clock-output-names = "gem3";
93 		reg-names = "control", "domain";
94 		domain-id = <11>;
98 		#clock-cells = <0>;
99 		compatible = "ti,keystone,psc-clock";
100 		clocks = <&chipclk13>;
101 		clock-output-names = "tac";
103 		reg-names = "control", "domain";
104 		domain-id = <17>;
108 		#clock-cells = <0>;
109 		compatible = "ti,keystone,psc-clock";
110 		clocks = <&chipclk13>;
111 		clock-output-names = "rac";
113 		reg-names = "control", "domain";
114 		domain-id = <17>;
118 		#clock-cells = <0>;
119 		compatible = "ti,keystone,psc-clock";
120 		clocks = <&chipclk13>;
121 		clock-output-names = "dfe-pd0";
123 		reg-names = "control", "domain";
124 		domain-id = <18>;
128 		#clock-cells = <0>;
129 		compatible = "ti,keystone,psc-clock";
130 		clocks = <&chipclk13>;
131 		clock-output-names = "fftc-0";
133 		reg-names = "control", "domain";
134 		domain-id = <19>;
138 		#clock-cells = <0>;
139 		compatible = "ti,keystone,psc-clock";
140 		clocks = <&chipclk13>;
141 		clock-output-names = "osr";
143 		reg-names = "control", "domain";
144 		domain-id = <21>;
148 		#clock-cells = <0>;
149 		compatible = "ti,keystone,psc-clock";
150 		clocks = <&chipclk13>;
151 		clock-output-names = "tcp3d-0";
153 		reg-names = "control", "domain";
154 		domain-id = <22>;
158 		#clock-cells = <0>;
159 		compatible = "ti,keystone,psc-clock";
160 		clocks = <&chipclk13>;
161 		clock-output-names = "tcp3d-1";
163 		reg-names = "control", "domain";
164 		domain-id = <23>;
168 		#clock-cells = <0>;
169 		compatible = "ti,keystone,psc-clock";
170 		clocks = <&chipclk13>;
171 		clock-output-names = "vcp-0";
173 		reg-names = "control", "domain";
174 		domain-id = <24>;
178 		#clock-cells = <0>;
179 		compatible = "ti,keystone,psc-clock";
180 		clocks = <&chipclk13>;
181 		clock-output-names = "vcp-1";
183 		reg-names = "control", "domain";
184 		domain-id = <24>;
188 		#clock-cells = <0>;
189 		compatible = "ti,keystone,psc-clock";
190 		clocks = <&chipclk13>;
191 		clock-output-names = "vcp-2";
193 		reg-names = "control", "domain";
194 		domain-id = <24>;
198 		#clock-cells = <0>;
199 		compatible = "ti,keystone,psc-clock";
200 		clocks = <&chipclk13>;
201 		clock-output-names = "vcp-3";
203 		reg-names = "control", "domain";
204 		domain-id = <24>;
208 		#clock-cells = <0>;
209 		compatible = "ti,keystone,psc-clock";
210 		clocks = <&chipclk13>;
211 		clock-output-names = "bcp";
213 		reg-names = "control", "domain";
214 		domain-id = <26>;
218 		#clock-cells = <0>;
219 		compatible = "ti,keystone,psc-clock";
220 		clocks = <&chipclk13>;
221 		clock-output-names = "dfe-pd1";
223 		reg-names = "control", "domain";
224 		domain-id = <27>;
228 		#clock-cells = <0>;
229 		compatible = "ti,keystone,psc-clock";
230 		clocks = <&chipclk13>;
231 		clock-output-names = "fftc-1";
233 		reg-names = "control", "domain";
234 		domain-id = <28>;
238 		#clock-cells = <0>;
239 		compatible = "ti,keystone,psc-clock";
240 		clocks = <&chipclk13>;
241 		clock-output-names = "iqn-ail";
243 		reg-names = "control", "domain";
244 		domain-id = <29>;
248 		#clock-cells = <0>;
249 		compatible = "ti,keystone,psc-clock";
250 		clocks = <&clkmodrst0>;
251 		clock-output-names = "uart2";
253 		reg-names = "control", "domain";
254 		domain-id = <0>;
258 		#clock-cells = <0>;
259 		compatible = "ti,keystone,psc-clock";
260 		clocks = <&clkmodrst0>;
261 		clock-output-names = "uart3";
263 		reg-names = "control", "domain";
264 		domain-id = <0>;