Lines Matching +full:0 +full:x400
13 #clock-cells = <0>;
17 reg = <0x02620370 4>;
22 #clock-cells = <0>;
25 reg = <0x02620350 4>, <0x02310110 4>, <0x02310108 4>;
30 #clock-cells = <0>;
34 reg = <0x02620358 4>;
39 #clock-cells = <0>;
43 reg = <0x02620360 4>;
48 #clock-cells = <0>;
53 reg = <0x02350004 0xb00>, <0x02350000 0x400>;
54 domain-id = <0>;
58 #clock-cells = <0>;
62 reg = <0x0235002c 0xb00>, <0x02350000 0x400>;
68 #clock-cells = <0>;
72 reg = <0x02350040 0xb00>, <0x02350024 0x400>;
78 #clock-cells = <0>;
82 reg = <0x02350044 0xb00>, <0x02350028 0x400>;
88 #clock-cells = <0>;
92 reg = <0x02350048 0xb00>, <0x0235002c 0x400>;
98 #clock-cells = <0>;
102 reg = <0x02350064 0xb00>, <0x02350044 0x400>;
108 #clock-cells = <0>;
112 reg = <0x02350068 0xb00>, <0x02350044 0x400>;
118 #clock-cells = <0>;
122 reg = <0x0235006c 0xb00>, <0x02350044 0x400>;
128 #clock-cells = <0>;
131 clock-output-names = "fftc-0";
132 reg = <0x02350070 0xb00>, <0x0235004c 0x400>;
138 #clock-cells = <0>;
142 reg = <0x02350088 0xb00>, <0x0235004c 0x400>;
148 #clock-cells = <0>;
151 clock-output-names = "tcp3d-0";
152 reg = <0x0235008c 0xb00>, <0x02350058 0x400>;
158 #clock-cells = <0>;
162 reg = <0x02350094 0xb00>, <0x02350058 0x400>;
168 #clock-cells = <0>;
171 clock-output-names = "vcp-0";
172 reg = <0x0235009c 0xb00>, <0x02350060 0x400>;
178 #clock-cells = <0>;
182 reg = <0x023500a0 0xb00>, <0x02350060 0x400>;
188 #clock-cells = <0>;
192 reg = <0x023500a4 0xb00>, <0x02350060 0x400>;
198 #clock-cells = <0>;
202 reg = <0x023500a8 0xb00>, <0x02350060 0x400>;
208 #clock-cells = <0>;
212 reg = <0x023500bc 0xb00>, <0x02350068 0x400>;
218 #clock-cells = <0>;
222 reg = <0x023500c0 0xb00>, <0x02350044 0x400>;
228 #clock-cells = <0>;
232 reg = <0x023500c4 0xb00>, <0x023504c0 0x400>;
238 #clock-cells = <0>;
242 reg = <0x023500c8 0xb00>, <0x0235004c 0x400>;
248 #clock-cells = <0>;
252 reg = <0x02350000 0xb00>, <0x02350000 0x400>;
254 domain-id = <0>;
258 #clock-cells = <0>;
262 reg = <0x02350000 0xb00>, <0x02350000 0x400>;
264 domain-id = <0>;