Lines Matching full:clks
100 clocks = <&clks IMX7D_CLK_ARM>;
128 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
160 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
173 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
210 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
237 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
251 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
413 clocks = <&clks IMX7D_WDOG1_ROOT_CLK>;
420 clocks = <&clks IMX7D_WDOG2_ROOT_CLK>;
428 clocks = <&clks IMX7D_WDOG3_ROOT_CLK>;
436 clocks = <&clks IMX7D_WDOG4_ROOT_CLK>;
450 clocks = <&clks IMX7D_CLK_DUMMY>,
451 <&clks IMX7D_GPT1_ROOT_CLK>;
459 clocks = <&clks IMX7D_CLK_DUMMY>,
460 <&clks IMX7D_GPT2_ROOT_CLK>;
469 clocks = <&clks IMX7D_CLK_DUMMY>,
470 <&clks IMX7D_GPT3_ROOT_CLK>;
479 clocks = <&clks IMX7D_CLK_DUMMY>,
480 <&clks IMX7D_GPT4_ROOT_CLK>;
498 clocks = <&clks IMX7D_OCOTP_CLK>;
550 clks: ccm@30380000 { label
579 clocks = <&clks IMX7D_ADC_ROOT_CLK>;
588 clocks = <&clks IMX7D_ADC_ROOT_CLK>;
599 clocks = <&clks IMX7D_ECSPI4_ROOT_CLK>,
600 <&clks IMX7D_ECSPI4_ROOT_CLK>;
609 clocks = <&clks IMX7D_PWM1_ROOT_CLK>,
610 <&clks IMX7D_PWM1_ROOT_CLK>;
620 clocks = <&clks IMX7D_PWM2_ROOT_CLK>,
621 <&clks IMX7D_PWM2_ROOT_CLK>;
631 clocks = <&clks IMX7D_PWM3_ROOT_CLK>,
632 <&clks IMX7D_PWM3_ROOT_CLK>;
642 clocks = <&clks IMX7D_PWM4_ROOT_CLK>,
643 <&clks IMX7D_PWM4_ROOT_CLK>;
653 clocks = <&clks IMX7D_LCDIF_PIXEL_ROOT_CLK>,
654 <&clks IMX7D_LCDIF_PIXEL_ROOT_CLK>;
673 clocks = <&clks IMX7D_ECSPI1_ROOT_CLK>,
674 <&clks IMX7D_ECSPI1_ROOT_CLK>;
685 clocks = <&clks IMX7D_ECSPI2_ROOT_CLK>,
686 <&clks IMX7D_ECSPI2_ROOT_CLK>;
697 clocks = <&clks IMX7D_ECSPI3_ROOT_CLK>,
698 <&clks IMX7D_ECSPI3_ROOT_CLK>;
708 clocks = <&clks IMX7D_UART1_ROOT_CLK>,
709 <&clks IMX7D_UART1_ROOT_CLK>;
719 clocks = <&clks IMX7D_UART2_ROOT_CLK>,
720 <&clks IMX7D_UART2_ROOT_CLK>;
730 clocks = <&clks IMX7D_UART3_ROOT_CLK>,
731 <&clks IMX7D_UART3_ROOT_CLK>;
741 clocks = <&clks IMX7D_SAI1_IPG_CLK>,
742 <&clks IMX7D_SAI1_ROOT_CLK>,
743 <&clks IMX7D_CLK_DUMMY>,
744 <&clks IMX7D_CLK_DUMMY>;
756 clocks = <&clks IMX7D_SAI2_IPG_CLK>,
757 <&clks IMX7D_SAI2_ROOT_CLK>,
758 <&clks IMX7D_CLK_DUMMY>,
759 <&clks IMX7D_CLK_DUMMY>;
771 clocks = <&clks IMX7D_SAI3_IPG_CLK>,
772 <&clks IMX7D_SAI3_ROOT_CLK>,
773 <&clks IMX7D_CLK_DUMMY>,
774 <&clks IMX7D_CLK_DUMMY>;
785 clocks = <&clks IMX7D_CLK_DUMMY>,
786 <&clks IMX7D_CAN1_ROOT_CLK>;
795 clocks = <&clks IMX7D_CLK_DUMMY>,
796 <&clks IMX7D_CAN2_ROOT_CLK>;
807 clocks = <&clks IMX7D_I2C1_ROOT_CLK>;
817 clocks = <&clks IMX7D_I2C2_ROOT_CLK>;
827 clocks = <&clks IMX7D_I2C3_ROOT_CLK>;
837 clocks = <&clks IMX7D_I2C4_ROOT_CLK>;
846 clocks = <&clks IMX7D_UART4_ROOT_CLK>,
847 <&clks IMX7D_UART4_ROOT_CLK>;
857 clocks = <&clks IMX7D_UART5_ROOT_CLK>,
858 <&clks IMX7D_UART5_ROOT_CLK>;
868 clocks = <&clks IMX7D_UART6_ROOT_CLK>,
869 <&clks IMX7D_UART6_ROOT_CLK>;
879 clocks = <&clks IMX7D_UART7_ROOT_CLK>,
880 <&clks IMX7D_UART7_ROOT_CLK>;
889 clocks = <&clks IMX7D_USB_CTRL_CLK>;
900 clocks = <&clks IMX7D_USB_CTRL_CLK>;
923 clocks = <&clks IMX7D_USB_PHY1_CLK>;
929 clocks = <&clks IMX7D_USB_HSIC_ROOT_CLK>;
937 clocks = <&clks IMX7D_CLK_DUMMY>,
938 <&clks IMX7D_CLK_DUMMY>,
939 <&clks IMX7D_USDHC1_ROOT_CLK>;
949 clocks = <&clks IMX7D_CLK_DUMMY>,
950 <&clks IMX7D_CLK_DUMMY>,
951 <&clks IMX7D_USDHC2_ROOT_CLK>;
961 clocks = <&clks IMX7D_CLK_DUMMY>,
962 <&clks IMX7D_CLK_DUMMY>,
963 <&clks IMX7D_USDHC3_ROOT_CLK>;
973 clocks = <&clks IMX7D_SDMA_CORE_CLK>,
974 <&clks IMX7D_AHB_CHANNEL_ROOT_CLK>;
986 clocks = <&clks IMX7D_ENET_AXI_ROOT_CLK>,
987 <&clks IMX7D_ENET_AXI_ROOT_CLK>,
988 <&clks IMX7D_ENET1_TIME_ROOT_CLK>,
989 <&clks IMX7D_PLL_ENET_MAIN_125M_CLK>,
990 <&clks IMX7D_ENET_PHY_REF_ROOT_CLK>;