Lines Matching +full:anatop +full:- +full:reg +full:- +full:offset
2 * Copyright 2015-2016 Freescale Semiconductor, Inc.
9 #include <dt-bindings/clock/imx6ul-clock.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include "imx6ull-pinfunc.h"
13 #include "imx6ull-pinfunc-snvs.h"
50 #address-cells = <1>;
51 #size-cells = <0>;
54 compatible = "arm,cortex-a7";
56 reg = <0>;
57 clock-latency = <61036>; /* two CLK32 periods */
58 operating-points = <
63 fsl,soc-operating-points = <
79 clock-names = "arm", "pll2_bus", "pll2_pfd2_396m", "secondary_sel", "step",
84 intc: interrupt-controller@00a01000 {
85 compatible = "arm,cortex-a7-gic";
86 #interrupt-cells = <3>;
87 interrupt-controller;
88 reg = <0x00a01000 0x1000>,
93 #address-cells = <1>;
94 #size-cells = <0>;
97 compatible = "fixed-clock";
98 reg = <0>;
99 #clock-cells = <0>;
100 clock-frequency = <32768>;
101 clock-output-names = "ckil";
105 compatible = "fixed-clock";
106 reg = <1>;
107 #clock-cells = <0>;
108 clock-frequency = <24000000>;
109 clock-output-names = "osc";
113 compatible = "fixed-clock";
114 reg = <2>;
115 #clock-cells = <0>;
116 clock-frequency = <0>;
117 clock-output-names = "ipp_di0";
121 compatible = "fixed-clock";
122 reg = <3>;
123 #clock-cells = <0>;
124 clock-frequency = <0>;
125 clock-output-names = "ipp_di1";
130 #address-cells = <1>;
131 #size-cells = <1>;
132 compatible = "simple-bus";
133 interrupt-parent = <&gpc>;
149 clock-names = "pll2_pfd2_396m", "pll2_198m", "pll2_bus", "arm", "pll3_usb_otg",
157 compatible = "arm,cortex-a7-pmu";
163 compatible = "fsl,lpm-sram";
164 reg = <0x00900000 0x4000>;
168 compatible = "fsl,ddr-lpm-sram";
169 reg = <0x00904000 0x1000>;
173 compatible = "mmio-sram";
174 reg = <0x00905000 0x1B000>;
177 dma_apbh: dma-apbh@01804000 {
178 compatible = "fsl,imx6ul-dma-apbh", "fsl,imx28-dma-apbh";
179 reg = <0x01804000 0x2000>;
184 interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3";
185 #dma-cells = <1>;
186 dma-channels = <4>;
190 gpmi: gpmi-nand@01806000{
191 compatible = "fsl,imx6ull-gpmi-nand", "fsl, imx6ul-gpmi-nand";
192 #address-cells = <1>;
193 #size-cells = <1>;
194 reg = <0x01806000 0x2000>, <0x01808000 0x4000>;
195 reg-names = "gpmi-nand", "bch";
197 interrupt-names = "bch";
203 clock-names = "gpmi_io", "gpmi_apb", "gpmi_bch",
206 dma-names = "rx-tx";
210 aips1: aips-bus@02000000 {
211 compatible = "fsl,aips-bus", "simple-bus";
212 #address-cells = <1>;
213 #size-cells = <1>;
214 reg = <0x02000000 0x100000>;
217 spba-bus@02000000 {
218 compatible = "fsl,spba-bus", "simple-bus";
219 #address-cells = <1>;
220 #size-cells = <1>;
221 reg = <0x02000000 0x40000>;
225 compatible = "fsl,imx6ul-spdif", "fsl,imx35-spdif";
226 reg = <0x02004000 0x4000>;
230 dma-names = "rx", "tx";
238 clock-names = "core", "rxtx0",
247 #address-cells = <1>;
248 #size-cells = <0>;
249 compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi";
250 reg = <0x02008000 0x4000>;
254 clock-names = "ipg", "per";
256 dma-names = "rx", "tx";
261 #address-cells = <1>;
262 #size-cells = <0>;
263 compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi";
264 reg = <0x0200c000 0x4000>;
268 clock-names = "ipg", "per";
270 dma-names = "rx", "tx";
275 #address-cells = <1>;
276 #size-cells = <0>;
277 compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi";
278 reg = <0x02010000 0x4000>;
282 clock-names = "ipg", "per";
284 dma-names = "rx", "tx";
289 #address-cells = <1>;
290 #size-cells = <0>;
291 compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi";
292 reg = <0x02014000 0x4000>;
296 clock-names = "ipg", "per";
298 dma-names = "rx", "tx";
303 compatible = "fsl,imx6ul-uart",
304 "fsl,imx6q-uart", "fsl,imx21-uart";
305 reg = <0x02018000 0x4000>;
309 clock-names = "ipg", "per";
311 dma-names = "rx", "tx";
316 compatible = "fsl,imx6ul-uart",
317 "fsl,imx6q-uart", "fsl,imx21-uart";
318 reg = <0x02020000 0x4000>;
322 clock-names = "ipg", "per";
327 compatible = "fsl,imx6ull-esai";
328 reg = <0x02024000 0x4000>;
335 clock-names = "core", "mem", "extal",
338 dma-names = "rx", "tx";
339 dma-source = <&gpr 0 14 0 15>;
344 compatible = "fsl,imx6ul-sai",
345 "fsl,imx6sx-sai";
346 reg = <0x02028000 0x4000>;
352 clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
353 dma-names = "rx", "tx";
359 compatible = "fsl,imx6ul-sai",
360 "fsl,imx6sx-sai";
361 reg = <0x0202c000 0x4000>;
367 clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
368 dma-names = "rx", "tx";
374 compatible = "fsl,imx6ul-sai",
375 "fsl,imx6sx-sai";
376 reg = <0x02030000 0x4000>;
382 clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
383 dma-names = "rx", "tx";
389 compatible = "fsl,imx53-asrc";
390 reg = <0x02034000 0x4000>;
399 clock-names = "mem", "ipg", "asrck_0",
406 dma-names = "rxa", "rxb", "rxc",
408 fsl,asrc-rate = <48000>;
409 fsl,asrc-width = <16>;
415 compatible = "fsl,imx6ul-tsc";
416 reg = <0x02040000 0x4000>, <0x0219c000 0x4000>;
421 clock-names = "tsc", "adc";
426 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
427 reg = <0x02080000 0x4000>;
431 clock-names = "ipg", "per";
432 #pwm-cells = <2>;
436 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
437 reg = <0x02084000 0x4000>;
441 clock-names = "ipg", "per";
442 #pwm-cells = <2>;
446 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
447 reg = <0x02088000 0x4000>;
451 clock-names = "ipg", "per";
452 #pwm-cells = <2>;
456 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
457 reg = <0x0208c000 0x4000>;
461 clock-names = "ipg", "per";
462 #pwm-cells = <2>;
466 compatible = "fsl,imx6ul-flexcan", "fsl,imx6q-flexcan";
467 reg = <0x02090000 0x4000>;
471 clock-names = "ipg", "per";
472 stop-mode = <&gpr 0x10 1 0x10 17>;
477 compatible = "fsl,imx6ul-flexcan", "fsl,imx6q-flexcan";
478 reg = <0x02094000 0x4000>;
482 clock-names = "ipg", "per";
483 stop-mode = <&gpr 0x10 2 0x10 18>;
488 compatible = "fsl,imx6ul-gpt", "fsl,imx31-gpt";
489 reg = <0x02098000 0x4000>;
493 clock-names = "ipg", "per";
497 compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio";
498 reg = <0x0209c000 0x4000>;
501 gpio-controller;
502 #gpio-cells = <2>;
503 interrupt-controller;
504 #interrupt-cells = <2>;
508 compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio";
509 reg = <0x020a0000 0x4000>;
512 gpio-controller;
513 #gpio-cells = <2>;
514 interrupt-controller;
515 #interrupt-cells = <2>;
519 compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio";
520 reg = <0x020a4000 0x4000>;
523 gpio-controller;
524 #gpio-cells = <2>;
525 interrupt-controller;
526 #interrupt-cells = <2>;
530 compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio";
531 reg = <0x020a8000 0x4000>;
534 gpio-controller;
535 #gpio-cells = <2>;
536 interrupt-controller;
537 #interrupt-cells = <2>;
541 compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio";
542 reg = <0x020ac000 0x4000>;
545 gpio-controller;
546 #gpio-cells = <2>;
547 interrupt-controller;
548 #interrupt-cells = <2>;
552 compatible = "fsl,imx6ul-snvs";
553 reg = <0x020b0000 0x4000>;
558 compatible = "fsl,imx6ul-fec", "fsl,imx6q-fec";
559 reg = <0x020b4000 0x4000>;
567 clock-names = "ipg", "ahb", "ptp",
569 stop-mode = <&gpr 0x10 4>;
570 fsl,num-tx-queues=<1>;
571 fsl,num-rx-queues=<1>;
572 fsl,magic-packet;
578 compatible = "fsl,imx6ul-kpp", "fsl,imx21-kpp";
579 reg = <0x020b8000 0x4000>;
586 compatible = "fsl,imx6ul-wdt", "fsl,imx21-wdt";
587 reg = <0x020bc000 0x4000>;
593 compatible = "fsl,imx6ul-wdt", "fsl,imx21-wdt";
594 reg = <0x020c0000 0x4000>;
601 compatible = "fsl,imx6ul-ccm";
602 reg = <0x020c4000 0x4000>;
605 #clock-cells = <1>;
607 clock-names = "ckil", "osc", "ipp_di0", "ipp_di1";
610 anatop: anatop@020c8000 { label
611 compatible = "fsl,imx6ul-anatop", "fsl,imx6q-anatop",
612 "syscon", "simple-bus";
613 reg = <0x020c8000 0x1000>;
618 reg_3p0: regulator-3p0@120 {
619 compatible = "fsl,anatop-regulator";
620 regulator-name = "vdd3p0";
621 regulator-min-microvolt = <2625000>;
622 regulator-max-microvolt = <3400000>;
623 anatop-reg-offset = <0x120>;
624 anatop-vol-bit-shift = <8>;
625 anatop-vol-bit-width = <5>;
626 anatop-min-bit-val = <0>;
627 anatop-min-voltage = <2625000>;
628 anatop-max-voltage = <3400000>;
629 anatop-enable-bit = <0>;
632 reg_arm: regulator-vddcore@140 {
633 compatible = "fsl,anatop-regulator";
634 regulator-name = "cpu";
635 regulator-min-microvolt = <725000>;
636 regulator-max-microvolt = <1450000>;
637 regulator-always-on;
638 anatop-reg-offset = <0x140>;
639 anatop-vol-bit-shift = <0>;
640 anatop-vol-bit-width = <5>;
641 anatop-delay-reg-offset = <0x170>;
642 anatop-delay-bit-shift = <24>;
643 anatop-delay-bit-width = <2>;
644 anatop-min-bit-val = <1>;
645 anatop-min-voltage = <725000>;
646 anatop-max-voltage = <1450000>;
649 reg_soc: regulator-vddsoc@140 {
650 compatible = "fsl,anatop-regulator";
651 regulator-name = "vddsoc";
652 regulator-min-microvolt = <725000>;
653 regulator-max-microvolt = <1450000>;
654 regulator-always-on;
655 anatop-reg-offset = <0x140>;
656 anatop-vol-bit-shift = <18>;
657 anatop-vol-bit-width = <5>;
658 anatop-delay-reg-offset = <0x170>;
659 anatop-delay-bit-shift = <28>;
660 anatop-delay-bit-width = <2>;
661 anatop-min-bit-val = <1>;
662 anatop-min-voltage = <725000>;
663 anatop-max-voltage = <1450000>;
668 compatible = "fsl,imx6ul-usbphy", "fsl,imx23-usbphy";
669 reg = <0x020c9000 0x1000>;
672 phy-3p0-supply = <®_3p0>;
673 fsl,anatop = <&anatop>;
677 compatible = "fsl,imx6ul-usbphy", "fsl,imx23-usbphy";
678 reg = <0x020ca000 0x1000>;
681 phy-3p0-supply = <®_3p0>;
682 fsl,anatop = <&anatop>;
686 compatible = "fsl,imx6ul-tempmon", "fsl,imx6sx-tempmon";
688 fsl,tempmon = <&anatop>;
689 fsl,tempmon-data = <&ocotp>;
694 compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
695 reg = <0x020cc000 0x4000>;
697 snvs_rtc: snvs-rtc-lp {
698 compatible = "fsl,sec-v4.0-mon-rtc-lp";
700 offset = <0x34>;
704 snvs_poweroff: snvs-poweroff {
705 compatible = "syscon-poweroff";
707 offset = <0x38>;
711 snvs_pwrkey: snvs-powerkey {
712 compatible = "fsl,sec-v4.0-pwrkey";
721 reg = <0x020d0000 0x4000>;
726 reg = <0x020d4000 0x4000>;
731 compatible = "fsl,imx6ul-src", "fsl,imx51-src";
732 reg = <0x020d8000 0x4000>;
735 #reset-cells = <1>;
739 compatible = "fsl,imx6ul-gpc", "fsl,imx6q-gpc";
740 reg = <0x020dc000 0x4000>;
741 interrupt-controller;
742 #interrupt-cells = <3>;
744 interrupt-parent = <&intc>;
745 fsl,mf-mix-wakeup-irq = <0xfc00000 0x7d00 0x0 0x1400640>;
749 compatible = "fsl,imx6ul-iomuxc";
750 reg = <0x020e0000 0x4000>;
753 gpr: iomuxc-gpr@020e4000 {
754 compatible = "fsl,imx6ul-iomuxc-gpr", "syscon";
755 reg = <0x020e4000 0x4000>;
759 compatible = "fsl,imx6sx-mqs";
765 compatible = "fsl,imx6ul-gpt", "fsl,imx31-gpt";
766 reg = <0x020e8000 0x4000>;
770 clock-names = "ipg", "per";
774 compatible = "fsl,imx6ul-sdma", "fsl,imx35-sdma";
775 reg = <0x020ec000 0x4000>;
779 clock-names = "ipg", "ahb";
780 #dma-cells = <3>;
782 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx6q.bin";
786 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
787 reg = <0x020f0000 0x4000>;
791 clock-names = "ipg", "per";
792 #pwm-cells = <2>;
796 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
797 reg = <0x020f4000 0x4000>;
801 clock-names = "ipg", "per";
802 #pwm-cells = <2>;
806 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
807 reg = <0x020f8000 0x4000>;
811 clock-names = "ipg", "per";
812 #pwm-cells = <2>;
816 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
817 reg = <0x020fc000 0x4000>;
821 clock-names = "ipg", "per";
822 #pwm-cells = <2>;
826 aips2: aips-bus@02100000 {
827 compatible = "fsl,aips-bus", "simple-bus";
828 #address-cells = <1>;
829 #size-cells = <1>;
830 reg = <0x02100000 0x100000>;
834 compatible = "fsl,imx6ul-usb", "fsl,imx27-usb";
835 reg = <0x02184000 0x200>;
840 fsl,anatop = <&anatop>;
841 ahb-burst-config = <0x0>;
842 tx-burst-size-dword = <0x10>;
843 rx-burst-size-dword = <0x10>;
848 compatible = "fsl,imx6ul-usb", "fsl,imx27-usb";
849 reg = <0x02184200 0x200>;
854 ahb-burst-config = <0x0>;
855 tx-burst-size-dword = <0x10>;
856 rx-burst-size-dword = <0x10>;
861 #index-cells = <1>;
862 compatible = "fsl,imx6ul-usbmisc", "fsl,imx6q-usbmisc";
863 reg = <0x02184800 0x200>;
867 compatible = "fsl,imx6ul-fec", "fsl,imx6q-fec";
868 reg = <0x02188000 0x4000>;
876 clock-names = "ipg", "ahb", "ptp",
878 stop-mode = <&gpr 0x10 3>;
879 fsl,num-tx-queues=<1>;
880 fsl,num-rx-queues=<1>;
881 fsl,magic-packet;
887 compatible = "fsl,imx6ul-usdhc", "fsl,imx6sx-usdhc";
888 reg = <0x02190000 0x4000>;
893 clock-names = "ipg", "ahb", "per";
894 bus-width = <4>;
895 fsl,tuning-step= <2>;
900 compatible = "fsl,imx6ul-usdhc", "fsl,imx6sx-usdhc";
901 reg = <0x02194000 0x4000>;
906 clock-names = "ipg", "ahb", "per";
907 bus-width = <4>;
908 fsl,tuning-step= <2>;
913 compatible = "fsl,imx6ul-adc", "fsl,vf610-adc";
914 reg = <0x02198000 0x4000>;
917 num-channels = <2>;
918 clock-names = "adc";
923 #address-cells = <1>;
924 #size-cells = <0>;
925 compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c";
926 reg = <0x021a0000 0x4000>;
933 #address-cells = <1>;
934 #size-cells = <0>;
935 compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c";
936 reg = <0x021a4000 0x4000>;
943 #address-cells = <1>;
944 #size-cells = <0>;
945 compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c";
946 reg = <0x021a8000 0x4000>;
953 compatible = "fsl,imx6ul-romcp", "syscon";
954 reg = <0x021ac000 0x4000>;
958 compatible = "fsl,imx6ul-mmdc", "fsl,imx6q-mmdc";
959 reg = <0x021b0000 0x4000>;
963 compatible = "fsl,imx6ul-weim", "fsl,imx6q-weim";
964 reg = <0x021b8000 0x4000>;
969 ocotp: ocotp-ctrl@021bc000 {
970 compatible = "fsl,imx6ull-ocotp", "syscon";
971 reg = <0x021bc000 0x4000>;
976 compatible = "fsl,imx6ul-csu";
977 reg = <0x021c0000 0x4000>;
983 compatible = "fsl,imx6ul-csi", "fsl,imx6s-csi";
984 reg = <0x021c4000 0x4000>;
989 clock-names = "disp-axi", "csi_mclk", "disp_dcic";
994 compatible = "fsl,imx6ul-lcdif", "fsl,imx28-lcdif";
995 reg = <0x021c8000 0x4000>;
1000 clock-names = "pix", "axi", "disp_axi";
1005 compatible = "fsl,imx6ull-pxp-dma", "fsl,imx7d-pxp-dma";
1006 reg = <0x021cc000 0x4000>;
1010 clock-names = "pxp_ipg", "pxp_axi";
1015 #address-cells = <1>;
1016 #size-cells = <0>;
1017 compatible = "fsl,imx6ull-qspi", "fsl,imx6ul-qspi";
1018 reg = <0x021e0000 0x4000>, <0x60000000 0x10000000>;
1019 reg-names = "QuadSPI", "QuadSPI-memory";
1023 clock-names = "qspi_en", "qspi";
1028 compatible = "fsl,imx6ul-uart",
1029 "fsl,imx6q-uart", "fsl,imx21-uart";
1030 reg = <0x021e8000 0x4000>;
1034 clock-names = "ipg", "per";
1036 dma-names = "rx", "tx";
1041 compatible = "fsl,imx6ul-uart",
1042 "fsl,imx6q-uart", "fsl,imx21-uart";
1043 reg = <0x021ec000 0x4000>;
1047 clock-names = "ipg", "per";
1049 dma-names = "rx", "tx";
1054 compatible = "fsl,imx6ul-uart",
1055 "fsl,imx6q-uart", "fsl,imx21-uart";
1056 reg = <0x021f0000 0x4000>;
1060 clock-names = "ipg", "per";
1062 dma-names = "rx", "tx";
1067 compatible = "fsl,imx6ul-uart",
1068 "fsl,imx6q-uart", "fsl,imx21-uart";
1069 reg = <0x021f4000 0x4000>;
1073 clock-names = "ipg", "per";
1075 dma-names = "rx", "tx";
1080 #address-cells = <1>;
1081 #size-cells = <0>;
1082 compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c";
1083 reg = <0x021f8000 0x4000>;
1090 compatible = "fsl,imx6ul-uart",
1091 "fsl,imx6q-uart", "fsl,imx21-uart";
1092 reg = <0x021fc000 0x4000>;
1096 clock-names = "ipg", "per";
1098 dma-names = "rx", "tx";
1103 aips3: aips-bus@02200000 {
1104 compatible = "fsl,aips-bus", "simple-bus";
1105 #address-cells = <1>;
1106 #size-cells = <1>;
1107 reg = <0x02200000 0x100000>;
1111 reg = <0x02280000 0x4000>;
1116 clock-names = "dcp";
1121 reg = <0x02284000 0x4000>;
1126 compatible = "fsl,imx6ul-uart",
1127 "fsl,imx6q-uart", "fsl,imx21-uart";
1128 reg = <0x02288000 0x4000>;
1132 clock-names = "ipg", "per";
1134 dma-names = "rx", "tx";
1139 compatible = "fsl,imx7d-epdc";
1141 reg = <0x0228c000 0x4000>;
1144 clock-names = "epdc_axi", "epdc_pix";
1145 /* Need to fix epdc-ram */
1146 /* epdc-ram = <&gpr 0x4 30>; */
1150 iomuxc_snvs: iomuxc-snvs@02290000 {
1151 compatible = "fsl,imx6ull-iomuxc-snvs";
1152 reg = <0x02290000 0x10000>;
1155 snvs_gpr: snvs-gpr@0x02294000 {
1156 compatible = "fsl, imx6ull-snvs-gpr";
1157 reg = <0x02294000 0x10000>;