Lines Matching +full:adp +full:- +full:disable
9 /dts-v1/;
11 #include <dt-bindings/input/input.h>
16 compatible = "fsl,imx6ull-14x14-evk", "fsl,imx6ull";
19 stdout-path = &uart1;
27 compatible = "pwm-backlight";
29 brightness-levels = <0 4 8 16 32 64 128 255>;
30 default-brightness-level = <6>;
35 compatible = "simple-bus";
36 #address-cells = <1>;
37 #size-cells = <0>;
40 compatible = "regulator-fixed";
42 regulator-name = "can-3v3";
43 regulator-min-microvolt = <3300000>;
44 regulator-max-microvolt = <3300000>;
49 compatible = "regulator-fixed";
50 regulator-name = "VSD_3V3";
51 regulator-min-microvolt = <3300000>;
52 regulator-max-microvolt = <3300000>;
54 enable-active-high;
57 reg_gpio_dvfs: regulator-gpio {
58 compatible = "regulator-gpio";
59 pinctrl-names = "default";
60 pinctrl-0 = <&pinctrl_dvfs>;
61 regulator-min-microvolt = <1300000>;
62 regulator-max-microvolt = <1400000>;
63 regulator-name = "gpio_dvfs";
64 regulator-type = "voltage";
71 compatible = "spi-gpio";
72 pinctrl-names = "default";
73 pinctrl-0 = <&pinctrl_spi4>;
75 gpio-sck = <&gpio5 11 0>;
76 gpio-mosi = <&gpio5 10 0>;
77 cs-gpios = <&gpio5 7 0>;
78 num-chipselects = <1>;
79 #address-cells = <1>;
80 #size-cells = <0>;
84 gpio-controller;
85 oe-gpios = <&gpio5 8 0>;
86 #gpio-cells = <2>;
88 registers-number = <1>;
89 registers-default = /bits/ 8 <0x57>;
90 spi-max-frequency = <100000>;
96 arm-supply = <®_arm>;
97 soc-supply = <®_soc>;
98 dc-supply = <®_gpio_dvfs>;
102 assigned-clocks = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>;
103 assigned-clock-rates = <786432000>;
107 pinctrl-names = "default";
108 pinctrl-0 = <&pinctrl_enet1>;
109 phy-mode = "rmii";
110 phy-handle = <ðphy0>;
115 pinctrl-names = "default";
116 pinctrl-0 = <&pinctrl_enet2>;
117 phy-mode = "rmii";
118 phy-handle = <ðphy1>;
122 #address-cells = <1>;
123 #size-cells = <0>;
125 ethphy0: ethernet-phy@2 {
126 compatible = "ethernet-phy-ieee802.3-c22";
130 ethphy1: ethernet-phy@1 {
131 compatible = "ethernet-phy-ieee802.3-c22";
142 fsl,ldo-bypass = <0>; /* DCDC, ldo-enable */
146 clock-frequency = <100000>;
147 pinctrl-names = "default";
148 pinctrl-0 = <&pinctrl_i2c1>;
161 interrupt-parent = <&gpio5>;
168 pinctrl-names = "default";
169 pinctrl-0 = <&pinctrl_i2c2>;
174 pinctrl-names = "default";
175 pinctrl-0 = <&pinctrl_hog_1>;
176 imx6ul-evk {
177 pinctrl_hog_1: hoggrp-1 {
369 pinctrl-names = "default_snvs";
370 pinctrl-0 = <&pinctrl_hog_2>;
371 imx6ul-evk {
372 pinctrl_hog_2: hoggrp-2 {
410 pinctrl-names = "default";
411 pinctrl-0 = <&pinctrl_lcdif_dat
418 bits-per-pixel = <16>;
419 bus-width = <24>;
421 display-timings {
422 native-mode = <&timing0>;
424 clock-frequency = <9200000>;
427 hfront-porch = <8>;
428 hback-porch = <4>;
429 hsync-len = <41>;
430 vback-porch = <2>;
431 vfront-porch = <4>;
432 vsync-len = <10>;
434 hsync-active = <0>;
435 vsync-active = <0>;
436 de-active = <1>;
437 pixelclk-active = <0>;
444 pinctrl-names = "default";
445 pinctrl-0 = <&pinctrl_pwm1>;
450 pinctrl-names = "default";
451 pinctrl-0 = <&pinctrl_qspi>;
456 #address-cells = <1>;
457 #size-cells = <1>;
459 spi-max-frequency = <29000000>;
460 spi-nor,ddr-quad-read-dummy = <6>;
466 pinctrl-names = "default";
467 pinctrl-0 = <&pinctrl_uart1>;
472 pinctrl-names = "default";
473 pinctrl-0 = <&pinctrl_uart2>;
474 fsl,uart-has-rtscts;
476 /* fsl,dte-mode; */
477 /* pinctrl-0 = <&pinctrl_uart2dte>; */
483 srp-disable;
484 hnp-disable;
485 adp-disable;
491 disable-over-current;
496 tx-d-cal = <0x5>;
500 tx-d-cal = <0x5>;
504 pinctrl-names = "default";
505 pinctrl-0 = <&pinctrl_usdhc1>;
506 cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
507 keep-power-in-suspend;
508 enable-sdio-wakeup;
509 vmmc-supply = <®_sd1_vmmc>;
514 pinctrl-names = "default";
515 pinctrl-0 = <&pinctrl_usdhc2>;
516 no-1-8-v;
517 non-removable;
518 keep-power-in-suspend;
519 enable-sdio-wakeup;
524 pinctrl-names = "default";
525 pinctrl-0 = <&pinctrl_wdog>;