Lines Matching +full:0 +full:x021b0000

54 		#size-cells = <0>;
56 cpu0: cpu@0 {
59 reg = <0>;
97 reg = <0x00a01000 0x1000>,
98 <0x00a02000 0x1000>,
99 <0x00a04000 0x2000>,
100 <0x00a06000 0x2000>;
105 #clock-cells = <0>;
112 #clock-cells = <0>;
119 #clock-cells = <0>;
120 clock-frequency = <0>;
126 #clock-cells = <0>;
127 clock-frequency = <0>;
146 reg = <0x00900000 0x20000>;
151 reg = <0x01804000 0x2000>;
152 interrupts = <0 13 IRQ_TYPE_LEVEL_HIGH>,
153 <0 13 IRQ_TYPE_LEVEL_HIGH>,
154 <0 13 IRQ_TYPE_LEVEL_HIGH>,
155 <0 13 IRQ_TYPE_LEVEL_HIGH>;
166 reg = <0x01806000 0x2000>, <0x01808000 0x2000>;
168 interrupts = <0 15 IRQ_TYPE_LEVEL_HIGH>;
177 dmas = <&dma_apbh 0>;
186 reg = <0x02000000 0x100000>;
193 reg = <0x02000000 0x40000>;
198 #size-cells = <0>;
200 reg = <0x02008000 0x4000>;
210 #size-cells = <0>;
212 reg = <0x0200c000 0x4000>;
222 #size-cells = <0>;
224 reg = <0x02010000 0x4000>;
234 #size-cells = <0>;
236 reg = <0x02014000 0x4000>;
247 reg = <0x02018000 0x4000>;
258 reg = <0x02020000 0x4000>;
269 reg = <0x02024000 0x4000>;
278 #sound-dai-cells = <0>;
280 reg = <0x02028000 0x4000>;
286 dmas = <&sdma 35 24 0>,
287 <&sdma 36 24 0>;
293 #sound-dai-cells = <0>;
295 reg = <0x0202c000 0x4000>;
301 dmas = <&sdma 37 24 0>,
302 <&sdma 38 24 0>;
308 #sound-dai-cells = <0>;
310 reg = <0x02030000 0x4000>;
316 dmas = <&sdma 39 24 0>,
317 <&sdma 40 24 0>;
325 reg = <0x02040000 0x4000>, <0x0219c000 0x4000>;
336 reg = <0x02080000 0x4000>;
347 reg = <0x02084000 0x4000>;
358 reg = <0x02088000 0x4000>;
369 reg = <0x0208c000 0x4000>;
380 reg = <0x02090000 0x4000>;
390 reg = <0x02094000 0x4000>;
400 reg = <0x02098000 0x4000>;
409 reg = <0x0209c000 0x4000>;
416 gpio-ranges = <&iomuxc 0 23 10>, <&iomuxc 10 17 6>,
422 reg = <0x020a0000 0x4000>;
429 gpio-ranges = <&iomuxc 0 49 16>, <&iomuxc 16 111 6>;
434 reg = <0x020a4000 0x4000>;
441 gpio-ranges = <&iomuxc 0 65 29>;
446 reg = <0x020a8000 0x4000>;
453 gpio-ranges = <&iomuxc 0 94 17>, <&iomuxc 17 117 12>;
458 reg = <0x020ac000 0x4000>;
465 gpio-ranges = <&iomuxc 0 7 10>, <&iomuxc 10 5 2>;
470 reg = <0x020b4000 0x4000>;
487 reg = <0x020b8000 0x4000>;
495 reg = <0x020bc000 0x4000>;
502 reg = <0x020c0000 0x4000>;
510 reg = <0x020c4000 0x4000>;
521 reg = <0x020c8000 0x1000>;
531 anatop-reg-offset = <0x120>;
534 anatop-min-bit-val = <0>;
537 anatop-enable-bit = <0>;
546 anatop-reg-offset = <0x140>;
547 anatop-vol-bit-shift = <0>;
549 anatop-delay-reg-offset = <0x170>;
563 anatop-reg-offset = <0x140>;
566 anatop-delay-reg-offset = <0x170>;
577 reg = <0x020c9000 0x1000>;
586 reg = <0x020ca000 0x1000>;
594 compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
595 reg = <0x020cc000 0x4000>;
598 compatible = "fsl,sec-v4.0-mon-rtc-lp";
600 offset = <0x34>;
608 offset = <0x38>;
609 mask = <0x60>;
614 compatible = "fsl,sec-v4.0-pwrkey";
623 reg = <0x020d0000 0x4000>;
628 reg = <0x020d4000 0x4000>;
634 reg = <0x020d8000 0x4000>;
642 reg = <0x020dc000 0x4000>;
651 reg = <0x020e0000 0x4000>;
657 reg = <0x020e4000 0x4000>;
662 reg = <0x020e8000 0x4000>;
672 reg = <0x020ec000 0x4000>;
683 reg = <0x020f0000 0x4000>;
694 reg = <0x020f4000 0x4000>;
705 reg = <0x020f8000 0x4000>;
716 reg = <0x020fc000 0x4000>;
730 reg = <0x02100000 0x100000>;
735 reg = <0x02184000 0x200>;
739 fsl,usbmisc = <&usbmisc 0>;
741 ahb-burst-config = <0x0>;
742 tx-burst-size-dword = <0x10>;
743 rx-burst-size-dword = <0x10>;
749 reg = <0x02184200 0x200>;
754 ahb-burst-config = <0x0>;
755 tx-burst-size-dword = <0x10>;
756 rx-burst-size-dword = <0x10>;
763 reg = <0x02184800 0x200>;
768 reg = <0x02188000 0x4000>;
785 reg = <0x02190000 0x4000>;
797 reg = <0x02194000 0x4000>;
809 reg = <0x02198000 0x4000>;
821 #size-cells = <0>;
823 reg = <0x021a0000 0x4000>;
831 #size-cells = <0>;
833 reg = <0x021a4000 0x4000>;
841 #size-cells = <0>;
843 reg = <0x021a8000 0x4000>;
851 reg = <0x021b0000 0x4000>;
856 reg = <0x021c8000 0x4000>;
867 #size-cells = <0>;
869 reg = <0x021e0000 0x4000>, <0x60000000 0x10000000>;
881 reg = <0x021e8000 0x4000>;
892 reg = <0x021ec000 0x4000>;
903 reg = <0x021f0000 0x4000>;
914 reg = <0x021f4000 0x4000>;
924 #size-cells = <0>;
926 reg = <0x021f8000 0x4000>;
935 reg = <0x021fc000 0x4000>;