arm/dts/imx6dl.dtsi

11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include "imx6dl-pinfunc.h"
21 		#address-cells = <1>;
22 		#size-cells = <0>;
25 			compatible = "arm,cortex-a9";
28 			next-level-cache = <&L2>;
29 			operating-points = <
35 			fsl,soc-operating-points = <
36 				/* ARM kHz  SOC-PU uV */
41 			clock-latency = <61036>; /* two CLK32 periods */
47 			clock-names = "arm", "pll2_pfd2_396m", "step",
49 			arm-supply = <&reg_arm>;
50 			pu-supply = <&reg_pu>;
51 			soc-supply = <&reg_soc>;
55 			compatible = "arm,cortex-a9";
58 			next-level-cache = <&L2>;
64 			compatible = "mmio-sram";
69 		aips1: aips-bus@02000000 {
71 				compatible = "fsl,imx6dl-iomuxc";
90 		aips2: aips-bus@02100000 {
92 				#address-cells = <1>;
93 				#size-cells = <0>;
94 				compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
103 	display-subsystem {
104 		compatible = "fsl,imx-display-subsystem";
108 	gpu-subsystem {
109 		compatible = "fsl,imx-gpu-subsystem";
115 	compatible = "fsl,imx6dl-gpt";
119 	compatible = "fsl,imx6dl-hdmi";
126 	clock-names = "di0_pll", "di1_pll",
132 	compatible = "fsl,imx6dl-vpu", "cnm,coda960";