Lines Matching +full:interrupt +full:- +full:names
4 * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd.
7 * SPDX-License-Identifier: GPL-2.0
10 #include <dt-bindings/clock/histb-clock.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/reset/ti-syscon.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
21 compatible = "arm,psci-0.2";
26 #address-cells = <2>;
27 #size-cells = <0>;
30 compatible = "arm,cortex-a53";
33 enable-method = "psci";
37 compatible = "arm,cortex-a53";
40 enable-method = "psci";
44 compatible = "arm,cortex-a53";
47 enable-method = "psci";
51 compatible = "arm,cortex-a53";
54 enable-method = "psci";
58 gic: interrupt-controller@f1001000 {
59 compatible = "arm,gic-400";
62 #address-cells = <0>;
63 #interrupt-cells = <3>;
64 interrupt-controller;
68 compatible = "arm,armv8-timer";
80 compatible = "simple-bus";
81 #address-cells = <1>;
82 #size-cells = <1>;
85 crg: clock-reset-controller@8a22000 {
86 compatible = "hisilicon,hi3798cv200-crg", "syscon", "simple-mfd";
88 #clock-cells = <1>;
89 #reset-cells = <2>;
91 gmacphyrst: reset-controller {
92 compatible = "ti,syscon-reset";
93 #reset-cells = <1>;
94 ti,reset-bits =
102 sysctrl: system-controller@8000000 {
103 compatible = "hisilicon,hi3798cv200-sysctrl", "syscon";
105 #clock-cells = <1>;
106 #reset-cells = <2>;
114 clock-names = "apb_pclk";
123 clock-names = "apb_pclk";
128 compatible = "hisilicon,hix5hd2-i2c";
130 #address-cells = <1>;
131 #size-cells = <0>;
133 clock-frequency = <400000>;
139 compatible = "hisilicon,hix5hd2-i2c";
141 #address-cells = <1>;
142 #size-cells = <0>;
144 clock-frequency = <400000>;
150 compatible = "hisilicon,hix5hd2-i2c";
152 #address-cells = <1>;
153 #size-cells = <0>;
155 clock-frequency = <400000>;
161 compatible = "hisilicon,hix5hd2-i2c";
163 #address-cells = <1>;
164 #size-cells = <0>;
166 clock-frequency = <400000>;
172 compatible = "hisilicon,hix5hd2-i2c";
174 #address-cells = <1>;
175 #size-cells = <0>;
177 clock-frequency = <400000>;
186 num-cs = <1>;
187 cs-gpios = <&gpio7 1 0>;
189 clock-names = "apb_pclk";
190 #address-cells = <1>;
191 #size-cells = <0>;
196 compatible = "snps,dw-mshc";
201 clock-names = "ciu", "biu";
208 gpio-controller;
209 #gpio-cells = <2>;
210 interrupt-controller;
211 #interrupt-cells = <2>;
213 clock-names = "apb_pclk";
221 gpio-controller;
222 #gpio-cells = <2>;
223 interrupt-controller;
224 #interrupt-cells = <2>;
226 clock-names = "apb_pclk";
234 gpio-controller;
235 #gpio-cells = <2>;
236 interrupt-controller;
237 #interrupt-cells = <2>;
239 clock-names = "apb_pclk";
247 gpio-controller;
248 #gpio-cells = <2>;
249 interrupt-controller;
250 #interrupt-cells = <2>;
252 clock-names = "apb_pclk";
260 gpio-controller;
261 #gpio-cells = <2>;
262 interrupt-controller;
263 #interrupt-cells = <2>;
265 clock-names = "apb_pclk";
273 gpio-controller;
274 #gpio-cells = <2>;
275 interrupt-controller;
276 #interrupt-cells = <2>;
278 clock-names = "apb_pclk";
286 gpio-controller;
287 #gpio-cells = <2>;
288 interrupt-controller;
289 #interrupt-cells = <2>;
291 clock-names = "apb_pclk";
299 gpio-controller;
300 #gpio-cells = <2>;
301 interrupt-controller;
302 #interrupt-cells = <2>;
304 clock-names = "apb_pclk";
312 gpio-controller;
313 #gpio-cells = <2>;
314 interrupt-controller;
315 #interrupt-cells = <2>;
317 clock-names = "apb_pclk";
325 gpio-controller;
326 #gpio-cells = <2>;
327 interrupt-controller;
328 #interrupt-cells = <2>;
330 clock-names = "apb_pclk";
338 gpio-controller;
339 #gpio-cells = <2>;
340 interrupt-controller;
341 #interrupt-cells = <2>;
343 clock-names = "apb_pclk";
351 gpio-controller;
352 #gpio-cells = <2>;
353 interrupt-controller;
354 #interrupt-cells = <2>;
356 clock-names = "apb_pclk";
364 gpio-controller;
365 #gpio-cells = <2>;
366 interrupt-controller;
367 #interrupt-cells = <2>;
369 clock-names = "apb_pclk";
374 compatible = "hisilicon,hi3798cv200-gmac", "hisilicon,hisi-gmac-v2";
380 clock-names = "mac_core", "mac_ifc";
384 reset-names = "mac_core", "mac_ifc", "phy";
389 compatible = "hisilicon,hi3798cv200-gmac", "hisilicon,hisi-gmac-v2";
395 clock-names = "mac_core", "mac_ifc";
399 reset-names = "mac_core", "mac_ifc", "phy";
404 compatible = "hisilicon,hix5hd2-ir";