Lines Matching +full:tx +full:- +full:fifo +full:- +full:depth
2 * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
8 #include "dra72-evm-common.dtsi"
9 #include <dt-bindings/net/ti-dp83867.h>
28 #include "dra72-evm-tps65917.dtsi"
31 /* LDO2_OUT --> VDDA_1V8_PHY2 */
32 regulator-always-on;
33 regulator-boot-on;
37 vdda-supply = <&ldo2_reg>;
41 interrupt-parent = <&gpio3>;
46 mode-gpios = <&pcf_gpio_21 4 GPIO_ACTIVE_LOW>,
53 phy-handle = <&dp83867_0>;
54 phy-mode = "rgmii-id";
59 phy-handle = <&dp83867_1>;
60 phy-mode = "rgmii-id";
65 dp83867_0: ethernet-phy@2 {
67 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
68 ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
69 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
70 ti,min-output-impedance;
73 dp83867_1: ethernet-phy@3 {
75 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
76 ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
77 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
78 ti,min-output-impedance;