arm/dts/dra72-evm-common.dtsi

2  * Copyright (C) 2014-2016 Texas Instruments Incorporated - http://www.ti.com/
8 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/clk/ti-dra7-atl.h>
15 	compatible = "ti,dra72-evm", "ti,dra722", "ti,dra72", "ti,dra7";
22 		stdout-path = &uart1;
23 		tick-timer = &timer2;
26 	evm_12v0: fixedregulator-evm12v0 {
28 		compatible = "regulator-fixed";
29 		regulator-name = "evm_12v0";
30 		regulator-min-microvolt = <12000000>;
31 		regulator-max-microvolt = <12000000>;
32 		regulator-always-on;
33 		regulator-boot-on;
36 	evm_5v0: fixedregulator-evm5v0 {
37 		/* Output 1 of TPS43351QDAPRQ1 on dra72-evm */
38 		/* Output 1 of LM5140QRWGTQ1 on dra71-evm */
39 		compatible = "regulator-fixed";
40 		regulator-name = "evm_5v0";
41 		regulator-min-microvolt = <5000000>;
42 		regulator-max-microvolt = <5000000>;
43 		vin-supply = <&evm_12v0>;
44 		regulator-always-on;
45 		regulator-boot-on;
48 	vsys_3v3: fixedregulator-vsys3v3 {
49 		/* Output 2 of TPS43351QDAPRQ1 on dra72-evm */
50 		/* Output 2 of LM5140QRWGTQ1 on dra71-evm */
51 		compatible = "regulator-fixed";
52 		regulator-name = "vsys_3v3";
53 		regulator-min-microvolt = <3300000>;
54 		regulator-max-microvolt = <3300000>;
55 		vin-supply = <&evm_12v0>;
56 		regulator-always-on;
57 		regulator-boot-on;
60 	evm_3v3_sw: fixedregulator-evm_3v3 {
62 		compatible = "regulator-fixed";
63 		regulator-name = "evm_3v3";
64 		regulator-min-microvolt = <3300000>;
65 		regulator-max-microvolt = <3300000>;
66 		vin-supply = <&vsys_3v3>;
67 		regulator-always-on;
68 		regulator-boot-on;
71 	aic_dvdd: fixedregulator-aic_dvdd {
73 		compatible = "regulator-fixed";
74 		regulator-name = "aic_dvdd";
75 		vin-supply = <&evm_3v3_sw>;
76 		regulator-min-microvolt = <1800000>;
77 		regulator-max-microvolt = <1800000>;
80 	evm_3v3_sd: fixedregulator-sd {
81 		compatible = "regulator-fixed";
82 		regulator-name = "evm_3v3_sd";
83 		regulator-min-microvolt = <3300000>;
84 		regulator-max-microvolt = <3300000>;
85 		vin-supply = <&evm_3v3_sw>;
86 		enable-active-high;
91 		compatible = "linux,extcon-usb-gpio";
92 		id-gpio = <&pcf_gpio_21 1 GPIO_ACTIVE_HIGH>;
96 		compatible = "linux,extcon-usb-gpio";
97 		id-gpio = <&pcf_gpio_21 2 GPIO_ACTIVE_HIGH>;
101 		compatible = "hdmi-connector";
108 				remote-endpoint = <&tpd12s015_out>;
121 			#address-cells = <1>;
122 			#size-cells = <0>;
128 					remote-endpoint = <&hdmi_out>;
136 					remote-endpoint = <&hdmi_connector_in>;
143 		compatible = "simple-audio-card";
144 		simple-audio-card,name = "DRA7xx-EVM";
145 		simple-audio-card,widgets =
150 		simple-audio-card,routing =
160 		simple-audio-card,format = "dsp_b";
161 		simple-audio-card,bitclock-master = <&sound0_master>;
162 		simple-audio-card,frame-master = <&sound0_master>;
163 		simple-audio-card,bitclock-inversion;
165 		sound0_master: simple-audio-card,cpu {
166 			sound-dai = <&mcasp3>;
167 			system-clock-frequency = <5644800>;
170 		simple-audio-card,codec {
171 			sound-dai = <&tlv320aic3106>;
179 		pinctrl-single,pins = <
191 		pinctrl-single,pins = <
206 		pinctrl-single,pins = <
213 		pinctrl-single,pins = <
222 	clock-frequency = <400000>;
226 		u-boot,i2c-offset-len = <0>;
228 		lines-initial-states = <0x1408>;
229 		gpio-controller;
230 		#gpio-cells = <2>;
231 		interrupt-controller;
232 		#interrupt-cells = <2>;
236 		#sound-dai-cells = <0>;
239 		adc-settle-ms = <40>;
240 		ai3x-micbias-vg = <1>;		/* 2.0V */
244 		AVDD-supply = <&evm_3v3_sw>;
245 		IOVDD-supply = <&evm_3v3_sw>;
246 		DRVDD-supply = <&evm_3v3_sw>;
247 		DVDD-supply = <&aic_dvdd>;
253 	clock-frequency = <400000>;
257 		u-boot,i2c-offset-len = <0>;
259 		gpio-controller;
260 		#gpio-cells = <2>;
267 		lines-initial-states = <0x0f2b>;
271 			gpio-hog;
273 			output-low;
274 			line-name = "vin6_sel_s0";
281 	interrupts-extended = <&crossbar_mpu GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
292 	nand@0,0 {
293 		/* To use NAND, DIP switch SW5 must be set like so:
297 		compatible = "ti,omap2-nand";
299 		interrupt-parent = <&gpmc>;
302 		rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 pin */
303 		ti,nand-ecc-opt = "bch8";
304 		ti,elm-id = <&elm>;
305 		nand-bus-width = <16>;
306 		gpmc,device-width = <2>;
307 		gpmc,sync-clk-ps = <0>;
308 		gpmc,cs-on-ns = <0>;
309 		gpmc,cs-rd-off-ns = <80>;
310 		gpmc,cs-wr-off-ns = <80>;
311 		gpmc,adv-on-ns = <0>;
312 		gpmc,adv-rd-off-ns = <60>;
313 		gpmc,adv-wr-off-ns = <60>;
314 		gpmc,we-on-ns = <10>;
315 		gpmc,we-off-ns = <50>;
316 		gpmc,oe-on-ns = <4>;
317 		gpmc,oe-off-ns = <40>;
318 		gpmc,access-ns = <40>;
319 		gpmc,wr-access-ns = <80>;
320 		gpmc,rd-cycle-ns = <80>;
321 		gpmc,wr-cycle-ns = <80>;
322 		gpmc,bus-turnaround-ns = <0>;
323 		gpmc,cycle2cycle-delay-ns = <0>;
324 		gpmc,clk-activation-ns = <0>;
325 		gpmc,wr-data-mux-bus-ns = <0>;
327 		/* All SPL-* partitions are sized to minimal length
329 		 * NAND flash this is equal to size of erase-block */
330 		#address-cells = <1>;
331 		#size-cells = <1>;
333 			label = "NAND.SPL";
337 			label = "NAND.SPL.backup1";
341 			label = "NAND.SPL.backup2";
345 			label = "NAND.SPL.backup3";
349 			label = "NAND.u-boot-spl-os";
353 			label = "NAND.u-boot";
357 			label = "NAND.u-boot-env";
361 			label = "NAND.u-boot-env.backup1";
365 			label = "NAND.kernel";
369 			label = "NAND.file-system";
393 	pinctrl-names = "default";
394 	pinctrl-0 = <&mmc1_pins_default>;
395 	vmmc-supply = <&evm_3v3_sd>;
396 	bus-width = <4>;
398 	 * SDCD signal is not being used here - using the fact that GPIO mode
401 	cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>;
402 	max-frequency = <192000000>;
406 	/* SW5-3 in ON position */
408 	pinctrl-names = "default";
409 	pinctrl-0 = <&mmc2_pins_default>;
411 	vmmc-supply = <&evm_3v3_sw>;
412 	bus-width = <8>;
413 	ti,non-removable;
414 	max-frequency = <192000000>;
423 	pinctrl-names = "default", "sleep", "active";
424 	pinctrl-0 = <&dcan1_pins_sleep>;
425 	pinctrl-1 = <&dcan1_pins_sleep>;
426 	pinctrl-2 = <&dcan1_pins_default>;
432 	spi-max-frequency = <76800000>;
434 		compatible = "s25fl256s1", "spi-flash";
435 		spi-max-frequency = <76800000>;
437 		spi-tx-bus-width = <1>;
438 		spi-rx-bus-width = <4>;
439 		#address-cells = <1>;
440 		#size-cells = <1>;
464 			label = "QSPI.u-boot";
468 			label = "QSPI.u-boot-spl-os";
472 			label = "QSPI.u-boot-env";
476 			label = "QSPI.u-boot-env.backup1";
484 			label = "QSPI.file-system";
499 			remote-endpoint = <&tpd12s015_in>;
505 	assigned-clocks = <&abe_dpll_sys_clk_mux>,
510 	assigned-clock-parents = <&sys_clkin2>, <&dpll_abe_m2_ck>;
511 	assigned-clock-rates = <0>, <0>, <180633600>, <361267200>, <5644800>;
522 	#sound-dai-cells = <0>;
524 	assigned-clocks = <&mcasp3_ahclkx_mux>;
525 	assigned-clock-parents = <&atl_clkin2_ck>;
529 	op-mode = <0>;          /* MCASP_IIS_MODE */
530 	tdm-slots = <2>;
532 	serial-dir = <  /* 0: INACTIVE, 1: TX, 2: RX */
535 	tx-num-evt = <32>;
536 	rx-num-evt = <32>;