Lines Matching +full:0 +full:x5c000000
58 reg = <0x0 0x48211000 0x0 0x1000>,
59 <0x0 0x48212000 0x0 0x1000>,
60 <0x0 0x48214000 0x0 0x2000>,
61 <0x0 0x48216000 0x0 0x2000>;
70 reg = <0x0 0x48281000 0x0 0x1000>;
76 #size-cells = <0>;
78 cpu0: cpu@0 {
81 reg = <0>;
95 cooling-min-level = <0>;
124 ranges = <0x0 0x0 0x0 0xc0000000>;
126 reg = <0x0 0x44000000 0x0 0x1000000>,
127 <0x0 0x45000000 0x0 0x1000>;
135 ranges = <0 0x4a000000 0x22c000>;
139 reg = <0x2000 0x2000>;
142 ranges = <0 0x2000 0x2000>;
144 scm_conf: scm_conf@0 {
146 reg = <0x0 0x1400>;
149 ranges = <0 0x0 0x1400>;
153 reg = <0xe00 0x4>;
164 #size-cells = <0>;
171 reg = <0x1400 0x0468>;
173 #size-cells = <0>;
177 pinctrl-single,function-mask = <0x3fffffff>;
182 reg = <0x1c04 0x0020>;
187 reg = <0x1c24 0x0024>;
192 reg = <0xb78 0xfc>;
195 ti,dma-safe-map = <0>;
201 reg = <0xc78 0x7c>;
204 ti,dma-safe-map = <0>;
211 reg = <0x5000 0x2000>;
215 #size-cells = <0>;
224 reg = <0x8000 0x3000>;
228 #size-cells = <0>;
240 ranges = <0 0x4ae00000 0x3f000>;
244 reg = <0x4000 0x40>;
250 reg = <0x6000 0x3000>;
255 #size-cells = <0>;
264 reg = <0xc000 0x1000>;
268 axi@0 {
272 ranges = <0x51000000 0x51000000 0x3000
273 0x0 0x20000000 0x10000000>;
276 reg = <0x51000000 0x2000>, <0x51002000 0x14c>, <0x1000 0x2000>;
278 interrupts = <0 232 0x4>, <0 233 0x4>;
282 ranges = <0x81000000 0 0 0x03000 0 0x00010000
283 0x82000000 0 0x20013000 0x13000 0 0xffed000>;
286 linux,pci-domain = <0>;
290 interrupt-map-mask = <0 0 0 7>;
291 interrupt-map = <0 0 0 1 &pcie1_intc 1>,
292 <0 0 0 2 &pcie1_intc 2>,
293 <0 0 0 3 &pcie1_intc 3>,
294 <0 0 0 4 &pcie1_intc 4>;
297 #address-cells = <0>;
307 ranges = <0x51800000 0x51800000 0x3000
308 0x0 0x30000000 0x10000000>;
312 reg = <0x51800000 0x2000>, <0x51802000 0x14c>, <0x1000 0x2000>;
314 interrupts = <0 355 0x4>, <0 356 0x4>;
318 ranges = <0x81000000 0 0 0x03000 0 0x00010000
319 0x82000000 0 0x30013000 0x13000 0 0xffed000>;
326 interrupt-map-mask = <0 0 0 7>;
327 interrupt-map = <0 0 0 1 &pcie2_intc 1>,
328 <0 0 0 2 &pcie2_intc 2>,
329 <0 0 0 3 &pcie2_intc 3>,
330 <0 0 0 4 &pcie2_intc 4>;
333 #address-cells = <0>;
341 reg = <0x40300000 0x80000>;
342 ranges = <0x0 0x40300000 0x80000>;
356 sram-hs@0 {
358 reg = <0x0 0x0>;
371 reg = <0x40400000 0x100000>;
372 ranges = <0x0 0x40400000 0x100000>;
380 reg = <0x40500000 0x100000>;
381 ranges = <0x0 0x40500000 0x100000>;
387 reg = <0x4a0021e0 0xc
388 0x4a00232c 0xc
389 0x4a002380 0x2c
390 0x4a0023C0 0x3c
391 0x4a002564 0x8
392 0x4a002574 0x50>;
400 reg = <0x40d00000 0x100>;
405 reg = <0x4a056000 0x1000>;
418 reg = <0x43300000 0x100000>;
428 ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 0>;
441 reg = <0x43400000 0x100000>;
449 reg = <0x43500000 0x100000>;
456 reg = <0x4ae10000 0x200>;
467 reg = <0x48055000 0x200>;
478 reg = <0x48057000 0x200>;
489 reg = <0x48059000 0x200>;
500 reg = <0x4805b000 0x200>;
511 reg = <0x4805d000 0x200>;
522 reg = <0x48051000 0x200>;
533 reg = <0x48053000 0x200>;
544 reg = <0x4806a000 0x100>;
556 reg = <0x4806c000 0x100>;
568 reg = <0x48020000 0x100>;
580 reg = <0x4806e000 0x100>;
592 reg = <0x48066000 0x100>;
604 reg = <0x48068000 0x100>;
616 reg = <0x48420000 0x100>;
626 reg = <0x48422000 0x100>;
636 reg = <0x48424000 0x100>;
646 reg = <0x4ae2b000 0x100>;
656 reg = <0x4a0f4000 0x200>;
669 reg = <0x4883a000 0x200>;
683 reg = <0x4883c000 0x200>;
697 reg = <0x4883e000 0x200>;
711 reg = <0x48840000 0x200>;
725 reg = <0x48842000 0x200>;
739 reg = <0x48844000 0x200>;
753 reg = <0x48846000 0x200>;
767 reg = <0x4885e000 0x200>;
781 reg = <0x48860000 0x200>;
795 reg = <0x48862000 0x200>;
809 reg = <0x48864000 0x200>;
823 reg = <0x48802000 0x200>;
837 reg = <0x4ae18000 0x80>;
845 reg = <0x48032000 0x80>;
852 reg = <0x48034000 0x80>;
859 reg = <0x48036000 0x80>;
866 reg = <0x48820000 0x80>;
873 reg = <0x48822000 0x80>;
880 reg = <0x48824000 0x80>;
887 reg = <0x48826000 0x80>;
894 reg = <0x4803e000 0x80>;
901 reg = <0x48086000 0x80>;
908 reg = <0x48088000 0x80>;
915 reg = <0x4ae20000 0x80>;
924 reg = <0x48828000 0x80>;
931 reg = <0x4882a000 0x80>;
938 reg = <0x4882c000 0x80>;
945 reg = <0x4882e000 0x80>;
952 reg = <0x4ae14000 0x80>;
959 reg = <0x4a0f6000 0x1000>;
966 reg = <0x4e000000 0x800>;
973 reg = <0x48070000 0x100>;
976 #size-cells = <0>;
983 reg = <0x48072000 0x100>;
986 #size-cells = <0>;
993 reg = <0x48060000 0x100>;
996 #size-cells = <0>;
1003 reg = <0x4807a000 0x100>;
1006 #size-cells = <0>;
1013 reg = <0x4807c000 0x100>;
1016 #size-cells = <0>;
1023 reg = <0x4809c000 0x400>;
1036 reg = <0x480b4000 0x400>;
1047 reg = <0x480ad000 0x400>;
1058 reg = <0x480d1000 0x400>;
1069 reg = <0x40d01000 0x100>;
1072 #iommu-cells = <0>;
1073 ti,syscon-mmuconfig = <&dsp1_system 0x0>;
1079 reg = <0x40d02000 0x100>;
1082 #iommu-cells = <0>;
1083 ti,syscon-mmuconfig = <&dsp1_system 0x1>;
1089 reg = <0x58882000 0x100>;
1092 #iommu-cells = <0>;
1099 reg = <0x55082000 0x100>;
1102 #iommu-cells = <0>;
1110 #address-cells = <0>;
1111 #size-cells = <0>;
1116 reg = <0x4ae07ddc 0x4>, <0x4ae07de0 0x4>,
1117 <0x4ae06014 0x4>, <0x4a003b20 0xc>,
1118 <0x4ae0c158 0x4>;
1122 ti,tranxdone-status-mask = <0x80>;
1124 ti,ldovbb-override-mask = <0x400>;
1126 ti,ldovbb-vset-mask = <0x1F>;
1134 1060000 0 0x0 0 0x02000000 0x01F00000
1135 1160000 0 0x4 0 0x02000000 0x01F00000
1136 1210000 0 0x8 0 0x02000000 0x01F00000
1143 #address-cells = <0>;
1144 #size-cells = <0>;
1149 reg = <0x4ae07e34 0x4>, <0x4ae07e24 0x4>,
1150 <0x4ae06010 0x4>, <0x4a0025cc 0xc>,
1151 <0x4a002470 0x4>;
1155 ti,tranxdone-status-mask = <0x40000000>;
1157 ti,ldovbb-override-mask = <0x400>;
1159 ti,ldovbb-vset-mask = <0x1F>;
1167 1055000 0 0x0 0 0x02000000 0x01F00000
1168 1150000 0 0x4 0 0x02000000 0x01F00000
1169 1250000 0 0x8 0 0x02000000 0x01F00000
1176 #address-cells = <0>;
1177 #size-cells = <0>;
1182 reg = <0x4ae07e30 0x4>, <0x4ae07e20 0x4>,
1183 <0x4ae06010 0x4>, <0x4a0025e0 0xc>,
1184 <0x4a00246c 0x4>;
1188 ti,tranxdone-status-mask = <0x20000000>;
1190 ti,ldovbb-override-mask = <0x400>;
1192 ti,ldovbb-vset-mask = <0x1F>;
1200 1055000 0 0x0 0 0x02000000 0x01F00000
1201 1150000 0 0x4 0 0x02000000 0x01F00000
1202 1250000 0 0x8 0 0x02000000 0x01F00000
1209 #address-cells = <0>;
1210 #size-cells = <0>;
1215 reg = <0x4ae07de4 0x4>, <0x4ae07de8 0x4>,
1216 <0x4ae06010 0x4>, <0x4a003b08 0xc>,
1217 <0x4ae0c154 0x4>;
1221 ti,tranxdone-status-mask = <0x10000000>;
1223 ti,ldovbb-override-mask = <0x400>;
1225 ti,ldovbb-vset-mask = <0x1F>;
1233 1090000 0 0x0 0 0x02000000 0x01F00000
1234 1210000 0 0x4 0 0x02000000 0x01F00000
1235 1280000 0 0x8 0 0x02000000 0x01F00000
1241 reg = <0x48098000 0x200>;
1244 #size-cells = <0>;
1262 reg = <0x4809a000 0x200>;
1265 #size-cells = <0>;
1278 reg = <0x480b8000 0x200>;
1281 #size-cells = <0>;
1291 reg = <0x480ba000 0x200>;
1294 #size-cells = <0>;
1304 reg = <0x4b300000 0x100>,
1305 <0x5c000000 0x4000000>;
1307 syscon-chipselects = <&scm_conf 0x558>;
1309 #size-cells = <0>;
1324 reg = <0x4a090000 0x20>;
1328 reg = <0x4A096000 0x80>, /* phy_rx */
1329 <0x4A096400 0x64>, /* phy_tx */
1330 <0x4A096800 0x40>; /* pll_ctrl */
1332 syscon-phy-power = <&scm_conf 0x374>;
1335 syscon-pllreset = <&scm_conf 0x3fc>;
1336 #phy-cells = <0>;
1341 reg = <0x4a094000 0x80>, /* phy_rx */
1342 <0x4a094400 0x64>; /* phy_tx */
1344 syscon-phy-power = <&scm_conf_pcie 0x1c>;
1345 syscon-pcs = <&scm_conf_pcie 0x10>;
1356 #phy-cells = <0>;
1361 reg = <0x4a095000 0x80>, /* phy_rx */
1362 <0x4a095400 0x64>; /* phy_tx */
1364 syscon-phy-power = <&scm_conf_pcie 0x20>;
1365 syscon-pcs = <&scm_conf_pcie 0x10>;
1376 #phy-cells = <0>;
1383 reg = <0x4a140000 0x1100>, <0x4a141100 0x7>;
1393 reg = <0x48838000 0x100>;
1406 reg = <0x4a080000 0x20>;
1411 reg = <0x4a084000 0x400>;
1412 syscon-phy-power = <&scm_conf 0x300>;
1417 #phy-cells = <0>;
1423 reg = <0x4a085000 0x400>;
1424 syscon-phy-power = <&scm_conf 0xe74>;
1429 #phy-cells = <0>;
1434 reg = <0x4a084400 0x80>,
1435 <0x4a084800 0x64>,
1436 <0x4a084c00 0x40>;
1438 syscon-phy-power = <&scm_conf 0x370>;
1445 #phy-cells = <0>;
1452 reg = <0x48880000 0x10000>;
1460 reg = <0x48890000 0x17000>;
1479 reg = <0x488c0000 0x10000>;
1487 reg = <0x488d0000 0x17000>;
1507 reg = <0x48900000 0x10000>;
1516 reg = <0x48910000 0x17000>;
1532 reg = <0x48078000 0xfc0>; /* device IO registers */
1541 reg = <0x50000000 0x37c>; /* device IO registers */
1543 dmas = <&edma_xbar 4 0>;
1558 reg = <0x4843c000 0x3ff>;
1570 reg = <0x48460000 0x2000>,
1571 <0x45800000 0x1000>;
1587 reg = <0x48464000 0x2000>,
1588 <0x45c00000 0x1000>;
1604 reg = <0x48468000 0x2000>,
1605 <0x46000000 0x1000>;
1620 reg = <0x4846c000 0x2000>,
1621 <0x48436000 0x1000>;
1636 reg = <0x48470000 0x2000>,
1637 <0x4843a000 0x1000>;
1652 reg = <0x48474000 0x2000>,
1653 <0x4844c000 0x1000>;
1668 reg = <0x48478000 0x2000>,
1669 <0x48450000 0x1000>;
1684 reg = <0x4847c000 0x2000>,
1685 <0x48454000 0x1000>;
1699 reg = <0x4a002a48 0x130>;
1706 ti,irqs-reserved = <0 1 2 3 5 6 131 132>;
1708 ti,irqs-safe-map = <0>;
1718 bd_ram_size = <0x2000>;
1719 no_bd_ram = <0>;
1720 mac_control = <0x20>;
1722 active_slave = <0>;
1723 cpts_clock_mult = <0x784CFE14>;
1726 reg = <0x48484000 0x1000
1727 0x48485200 0x2E00>;
1756 #size-cells = <0>;
1759 reg = <0x48485000 0x100>;
1774 reg= <0x4a002554 0x4>;
1782 reg = <0x4ae3c000 0x2000>;
1783 syscon-raminit = <&scm_conf 0x558 0>;
1792 reg = <0x48480000 0x2000>;
1793 syscon-raminit = <&scm_conf 0x558 1>;
1806 syscon-pll-ctrl = <&scm_conf 0x538>;
1813 reg = <0x58001000 0x1000>;
1819 syscon-pol = <&scm_conf 0x534>;
1824 reg = <0x58040000 0x200>,
1825 <0x58040200 0x80>,
1826 <0x58040300 0x80>,
1827 <0x58060000 0x19000>;
1839 reg = <0x4843e000 0x30>;
1850 reg = <0x4843e200 0x80>;
1860 reg = <0x4843e100 0x80>;
1869 reg = <0x48440000 0x30>;
1880 reg = <0x48440200 0x80>;
1890 reg = <0x48440100 0x80>;
1899 reg = <0x48442000 0x30>;
1910 reg = <0x48442200 0x80>;
1920 reg = <0x48442100 0x80>;
1930 reg = <0x4b500000 0xa0>;
1932 dmas = <&edma_xbar 111 0>, <&edma_xbar 110 0>;
1941 reg = <0x4b700000 0xa0>;
1943 dmas = <&edma_xbar 114 0>, <&edma_xbar 113 0>;
1952 reg = <0x480a5000 0xa0>;
1963 reg = <0x4b101000 0x300>;
1965 dmas = <&edma_xbar 119 0>;
1974 reg = <0x48090000 0x2000>;