arm/dts/armada-xp-mv78260.dtsi

6  * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
8  * This file is dual-licensed: you can use it either under the terms
50 #include "armada-xp.dtsi"
54 	compatible = "marvell,armadaxp-mv78260", "marvell,armadaxp", "marvell,armada-370-xp";
63 		#address-cells = <1>;
64 		#size-cells = <0>;
65 		enable-method = "marvell,armada-xp-smp";
69 			compatible = "marvell,sheeva-v7";
72 			clock-latency = <1000000>;
77 			compatible = "marvell,sheeva-v7";
80 			clock-latency = <1000000>;
90 		pcie-controller {
91 			compatible = "marvell,armada-xp-pcie";
95 			#address-cells = <3>;
96 			#size-cells = <2>;
98 			msi-parent = <&mpic>;
99 			bus-range = <0x00 0xff>;
134 				assigned-addresses = <0x82000800 0 0x40000 0 0x2000>;
136 				#address-cells = <3>;
137 				#size-cells = <2>;
138 				#interrupt-cells = <1>;
141 				interrupt-map-mask = <0 0 0 0>;
142 				interrupt-map = <0 0 0 0 &mpic 58>;
143 				marvell,pcie-port = <0>;
144 				marvell,pcie-lane = <0>;
151 				assigned-addresses = <0x82000800 0 0x44000 0 0x2000>;
153 				#address-cells = <3>;
154 				#size-cells = <2>;
155 				#interrupt-cells = <1>;
158 				interrupt-map-mask = <0 0 0 0>;
159 				interrupt-map = <0 0 0 0 &mpic 59>;
160 				marvell,pcie-port = <0>;
161 				marvell,pcie-lane = <1>;
168 				assigned-addresses = <0x82000800 0 0x48000 0 0x2000>;
170 				#address-cells = <3>;
171 				#size-cells = <2>;
172 				#interrupt-cells = <1>;
175 				interrupt-map-mask = <0 0 0 0>;
176 				interrupt-map = <0 0 0 0 &mpic 60>;
177 				marvell,pcie-port = <0>;
178 				marvell,pcie-lane = <2>;
185 				assigned-addresses = <0x82000800 0 0x4c000 0 0x2000>;
187 				#address-cells = <3>;
188 				#size-cells = <2>;
189 				#interrupt-cells = <1>;
192 				interrupt-map-mask = <0 0 0 0>;
193 				interrupt-map = <0 0 0 0 &mpic 61>;
194 				marvell,pcie-port = <0>;
195 				marvell,pcie-lane = <3>;
202 				assigned-addresses = <0x82000800 0 0x80000 0 0x2000>;
204 				#address-cells = <3>;
205 				#size-cells = <2>;
206 				#interrupt-cells = <1>;
209 				interrupt-map-mask = <0 0 0 0>;
210 				interrupt-map = <0 0 0 0 &mpic 62>;
211 				marvell,pcie-port = <1>;
212 				marvell,pcie-lane = <0>;
219 				assigned-addresses = <0x82000800 0 0x84000 0 0x2000>;
221 				#address-cells = <3>;
222 				#size-cells = <2>;
223 				#interrupt-cells = <1>;
226 				interrupt-map-mask = <0 0 0 0>;
227 				interrupt-map = <0 0 0 0 &mpic 63>;
228 				marvell,pcie-port = <1>;
229 				marvell,pcie-lane = <1>;
236 				assigned-addresses = <0x82000800 0 0x88000 0 0x2000>;
238 				#address-cells = <3>;
239 				#size-cells = <2>;
240 				#interrupt-cells = <1>;
243 				interrupt-map-mask = <0 0 0 0>;
244 				interrupt-map = <0 0 0 0 &mpic 64>;
245 				marvell,pcie-port = <1>;
246 				marvell,pcie-lane = <2>;
253 				assigned-addresses = <0x82000800 0 0x8c000 0 0x2000>;
255 				#address-cells = <3>;
256 				#size-cells = <2>;
257 				#interrupt-cells = <1>;
260 				interrupt-map-mask = <0 0 0 0>;
261 				interrupt-map = <0 0 0 0 &mpic 65>;
262 				marvell,pcie-port = <1>;
263 				marvell,pcie-lane = <3>;
270 				assigned-addresses = <0x82000800 0 0x42000 0 0x2000>;
272 				#address-cells = <3>;
273 				#size-cells = <2>;
274 				#interrupt-cells = <1>;
277 				interrupt-map-mask = <0 0 0 0>;
278 				interrupt-map = <0 0 0 0 &mpic 99>;
279 				marvell,pcie-port = <2>;
280 				marvell,pcie-lane = <0>;
286 		internal-regs {
288 				compatible = "marvell,orion-gpio";
291 				gpio-controller;
292 				#gpio-cells = <2>;
293 				interrupt-controller;
294 				#interrupt-cells = <2>;
299 				compatible = "marvell,orion-gpio";
302 				gpio-controller;
303 				#gpio-cells = <2>;
304 				interrupt-controller;
305 				#interrupt-cells = <2>;
310 				compatible = "marvell,orion-gpio";
313 				gpio-controller;
314 				#gpio-cells = <2>;
315 				interrupt-controller;
316 				#interrupt-cells = <2>;
321 				compatible = "marvell,armada-xp-neta";
332 	compatible = "marvell,mv78260-pinctrl";