Lines Matching +full:usb3 +full:- +full:phy0
4 * SPDX-License-Identifier: GPL-2.0
8 #include "armada-8040.dtsi" /* include SoC device tree */
11 model = "MACCHIATOBin-8040";
12 compatible = "marvell,armada8040-mcbin",
16 stdout-path = "serial0:115200n8";
33 simple-bus {
34 compatible = "simple-bus";
35 #address-cells = <1>;
36 #size-cells = <0>;
38 reg_usb3h0_vbus: usb3-vbus0 {
39 compatible = "regulator-fixed";
40 pinctrl-names = "default";
41 pinctrl-0 = <&cpm_xhci_vbus_pins>;
42 regulator-name = "reg-usb3h0-vbus";
43 regulator-min-microvolt = <5000000>;
44 regulator-max-microvolt = <5000000>;
45 startup-delay-us = <500000>;
46 enable-active-high;
47 regulator-always-on;
48 regulator-boot-on;
54 /* Accessible over the mini-USB CON9 connector on the main board */
62 * eMMC [0-10]
66 pin-func = < 1 1 1 1 1 1 1 1 1 1
70 /* on-board eMMC */
72 pinctrl-names = "default";
73 pinctrl-0 = <&ap_emmc_pins>;
74 bus-width= <8>;
81 * [0-31] = 0xff: Keep default CP0_shared_pins:
88 * [35-38] CP0 I2C1 and I2C0
101 * [56-61] Micro SD
105 pin-func = < 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff
113 cpm_xhci_vbus_pins: cpm-xhci-vbus-pins {
118 cpm_pcie_reset_pins: cpm-pcie-reset-pins {
126 pinctrl-names = "default";
127 pinctrl-0 = <&cpm_sdhci_pins>;
128 bus-width= <4>;
134 num-lanes = <4>;
135 pinctrl-names = "default";
136 pinctrl-0 = <&cpm_pcie_reset_pins>;
137 marvell,reset-gpio = <&cpm_gpio1 20 GPIO_ACTIVE_HIGH>; /* GPIO[52] */
142 pinctrl-names = "default";
143 pinctrl-0 = <&cpm_i2c0_pins>;
145 clock-frequency = <100000>;
149 pinctrl-names = "default";
150 pinctrl-0 = <&cpm_i2c1_pins>;
152 clock-frequency = <100000>;
169 phy0 {
170 phy-type = <PHY_TYPE_PEX0>;
173 phy-type = <PHY_TYPE_PEX0>;
176 phy-type = <PHY_TYPE_PEX0>;
179 phy-type = <PHY_TYPE_PEX0>;
182 phy-type = <PHY_TYPE_SFI>;
185 phy-type = <PHY_TYPE_SATA1>;
194 vbus-supply = <®_usb3h0_vbus>;
205 * [0-5] TDM
223 * [32-62] = 0xff: Keep default CP1_shared_pins:
226 pin-func = < 0x4 0x4 0x4 0x4 0x4 0x4 0x8 0x8 0x0 0x0
236 pinctrl-names = "default";
237 pinctrl-0 = <&cps_spi1_pins>;
240 spi-flash@0 {
241 #address-cells = <1>;
242 #size-cells = <1>;
243 compatible = "jedec,spi-nor";
245 spi-max-frequency = <10000000>;
248 compatible = "fixed-partitions";
249 #address-cells = <1>;
250 #size-cells = <1>;
253 label = "U-Boot";
274 phy0 {
275 phy-type = <PHY_TYPE_SGMII1>;
276 phy-speed = <PHY_SPEED_1_25G>;
279 phy-type = <PHY_TYPE_SATA0>;
282 phy-type = <PHY_TYPE_USB3_HOST0>;
285 phy-type = <PHY_TYPE_SATA1>;
288 phy-type = <PHY_TYPE_SFI>;
291 phy-type = <PHY_TYPE_SGMII3>;