Lines Matching +full:usb3 +full:- +full:phy0
3 * (DB-88F6720)
7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
8 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
10 * This file is dual-licensed: you can use it either under the terms
49 /dts-v1/;
50 #include <dt-bindings/gpio/gpio.h>
51 #include "armada-375.dtsi"
55 compatible = "marvell,a375-db", "marvell,armada375";
58 stdout-path = "serial0:115200n8";
62 /* So that mvebu u-boot can update the MAC addresses */
79 internal-regs {
81 pinctrl-0 = <&spi0_pins>;
82 pinctrl-names = "default";
89 u-boot,dm-pre-reloc;
91 spi-flash@0 {
92 u-boot,dm-pre-reloc;
93 #address-cells = <1>;
94 #size-cells = <1>;
95 compatible = "n25q128a13", "jedec,spi-nor";
97 spi-max-frequency = <108000000>;
103 clock-frequency = <100000>;
104 pinctrl-0 = <&i2c0_pins>;
105 pinctrl-names = "default";
110 clock-frequency = <100000>;
111 pinctrl-0 = <&i2c1_pins>;
112 pinctrl-names = "default";
116 u-boot,dm-pre-reloc;
121 sdio_st_pins: sdio-st-pins {
129 nr-ports = <2>;
133 pinctrl-0 = <&nand_pins>;
134 pinctrl-names = "default";
136 num-cs = <1>;
137 marvell,nand-keep-config;
138 marvell,nand-enable-arbiter;
139 nand-on-flash-bbt;
140 nand-ecc-strength = <4>;
141 nand-ecc-step-size = <512>;
144 label = "U-Boot";
161 usb3@58000 {
166 pinctrl-0 = <&sdio_pins &sdio_st_pins>;
167 pinctrl-names = "default";
169 cd-gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
170 wp-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
174 phy0: ethernet-phy@0 { label
178 phy3: ethernet-phy@3 {
188 phy = <&phy0>;
189 phy-mode = "rgmii-id";
195 phy-mode = "gmii";
200 pcie-controller {