Lines Matching refs:ldr
32 ldr x0, =GICD_BASE
34 ldr x1, =GICC_BASE
37 ldr x2, =DCFG_CCSR_SVR
38 ldr w2, [x2]
41 ldr w4, =SVR_DEV(SVR_LS1043A)
47 ldr x2, =SCFG_GIC400_ALIGN
48 ldr w2, [x2]
51 ldr x0, =GICD_BASE_64K
53 ldr x1, =GICC_BASE_64K
82 ldr x0, =CCI_AUX_CONTROL_BASE(20)
83 ldr x1, =0x00000010
94 ldr w1, =SVR_DEV(SVR_LS2080A)
98 ldr x0, =CCI_AUX_CONTROL_BASE(6)
99 ldr x1, =0x00000020
101 ldr x0, =CCI_AUX_CONTROL_BASE(20)
102 ldr x1, =0x00000020
108 ldr x0, =CCI_MN_BASE
109 ldr x1, =CCI_MN_RNF_NODEID_LIST
110 ldr x2, =CCI_MN_DVM_DOMAIN_CTL_SET
114 ldr x0, =CCI_S0_QOS_CONTROL_BASE(0)
115 ldr x1, =0x00FF000C
117 ldr x0, =CCI_S1_QOS_CONTROL_BASE(0)
118 ldr x1, =0x00FF000C
120 ldr x0, =CCI_S2_QOS_CONTROL_BASE(0)
121 ldr x1, =0x00FF000C
124 ldr x0, =CCI_S0_QOS_CONTROL_BASE(2)
125 ldr x1, =0x00FF000C
127 ldr x0, =CCI_S1_QOS_CONTROL_BASE(2)
128 ldr x1, =0x00FF000C
130 ldr x0, =CCI_S2_QOS_CONTROL_BASE(2)
131 ldr x1, =0x00FF000C
134 ldr x0, =CCI_S0_QOS_CONTROL_BASE(6)
135 ldr x1, =0x00FF000C
137 ldr x0, =CCI_S1_QOS_CONTROL_BASE(6)
138 ldr x1, =0x00FF000C
140 ldr x0, =CCI_S2_QOS_CONTROL_BASE(6)
141 ldr x1, =0x00FF000C
144 ldr x0, =CCI_S0_QOS_CONTROL_BASE(12)
145 ldr x1, =0x00FF000C
147 ldr x0, =CCI_S1_QOS_CONTROL_BASE(12)
148 ldr x1, =0x00FF000C
150 ldr x0, =CCI_S2_QOS_CONTROL_BASE(12)
151 ldr x1, =0x00FF000C
154 ldr x0, =CCI_S0_QOS_CONTROL_BASE(16)
155 ldr x1, =0x00FF000C
157 ldr x0, =CCI_S1_QOS_CONTROL_BASE(16)
158 ldr x1, =0x00FF000C
160 ldr x0, =CCI_S2_QOS_CONTROL_BASE(16)
161 ldr x1, =0x00FF000C
164 ldr x0, =CCI_S0_QOS_CONTROL_BASE(20)
165 ldr x1, =0x00FF000C
167 ldr x0, =CCI_S1_QOS_CONTROL_BASE(20)
168 ldr x1, =0x00FF000C
170 ldr x0, =CCI_S2_QOS_CONTROL_BASE(20)
171 ldr x1, =0x00FF000C
177 ldr x1, =SMMU_BASE
178 ldr w0, [x1, #0x10]
190 ldr x0, =GICR_BASE
202 ldr x0, =secondary_boot_func
211 ldr x1, =TZPCDECPROT_0_SET_BASE /* Decode Protection-0 Set Reg */
226 ldr w1, =SVR_DEV(SVR_LS2080A)
238 ldr x1, =TZASC_GATE_KEEPER(0)
239 ldr w0, [x1] /* Filter 0 Gate Keeper Register */
243 ldr x1, =TZASC_REGION_ATTRIBUTES_0(0)
244 ldr w0, [x1] /* Region-0 Attributes Register */
249 ldr x1, =TZASC_REGION_ID_ACCESS_0(0)
250 ldr w0, [x1] /* Region-0 Access Register */
255 ldr x1, =TZASC_GATE_KEEPER(1)
256 ldr w0, [x1] /* Filter 0 Gate Keeper Register */
260 ldr x1, =TZASC_REGION_ATTRIBUTES_0(1)
261 ldr w0, [x1] /* Region-1 Attributes Register */
266 ldr x1, =TZASC_REGION_ID_ACCESS_0(1)
267 ldr w0, [x1] /* Region-1 Attributes Register */
312 ldr x0, =CONFIG_SYS_FSL_OCRAM_BASE
313 ldr x1, =(CONFIG_SYS_FSL_OCRAM_BASE + CONFIG_SYS_FSL_OCRAM_SIZE)
326 ldr x0, =DCSR_DCFG_SBEESR2
328 ldr x0, =DCSR_DCFG_MBEESR2
337 ldr x1, =FSL_LSCH3_SVR
338 ldr w0, [x1]
353 ldr x2, [x0]
377 ldr x2, [x0]
467 ldr x0, =__spin_table
471 ldr x0, =__real_cntfrq
472 ldr x0, [x0]
488 ldr x0, [x11]
498 ldr x5, [x11, #24]
503 ldr x5, =ES_TO_AARCH64
505 ldr x4, [x11]
506 ldr x5, =ES_TO_AARCH32
514 ldr x4, [x11]
516 ldr x5, =ES_TO_AARCH64
534 ldr x0, =__spin_table
538 ldr x4, [x11]
540 ldr x5, [x11, #24]
543 ldr x5, =ES_TO_AARCH32
546 2: ldr x5, =ES_TO_AARCH64