Lines Matching +full:4 +full:x12

27 	lsl	x12, x0, #1
28 	msr	csselr_el1, x12		/* select cache level */
31 	and	x2, x6, #7		/* x2 <- log2(cache line size)-4 */
32 	add	x2, x2, #4		/* x2 <- log2(cache line size) */
38 	/* x12 <- cache level << 1 */
48 	orr	x9, x12, x7		/* map way and level to cisw value */
87 	lsl	x12, x0, #1
88 	add	x12, x12, x0		/* x0 <- tripled cache level */
89 	lsr	x12, x10, x12
90 	and	x12, x12, #7		/* x12 <- cache type */
91 	cmp	x12, #2
138 	mov	x2, #4
165 	mov	x2, #4