Lines Matching +full:secure +full:- +full:only

4         bool "Enable multiple CPUs to enter into U-Boot"
10 	  CPUECTLR_EL1.SMPEN bit before U-Boot.
25 	bool "Support spin-table enable method"
28 	  Say Y here to support "spin-table" enable method for booting Linux.
31 	    - Specify enable-method = "spin-table" in each CPU node in the
33 	    - Bring secondary CPUs into U-Boot proper in a board specific
38 	  U-Boot automatically does:
39 	    - Set "cpu-release-addr" property of each CPU node
41 	    - Reserve the code for the spin-table and the release address
44 menu "ARMv8 secure monitor firmware"
46 	bool "Enable ARMv8 secure monitor firmware framework support"
50 	  This framework is aimed at making secure monitor firmware load
52 	  Note: Only FIT format image is supported.
54 	    - Address of secure firmware.
55 	    - Address to hold the return address from secure firmware.
56 	    - Secure firmware FIT image related information.
58 	    - The target exception level that secure monitor firmware will
62 	bool "Enable ARMv8 secure monitor firmware framework support for SPL"
69 	bool "PSCI implementation in secure monitor firmware"
72 	  This config enables the ARMv8 PSCI implementation in secure monitor
77 	bool "ARMv8 secure monitor firmware ERET address byteorder swap"
81 	  Secure firmware exception return address is different with core's.
110 	  The PSCI in U-boot provides a general framework and each platform
131 	  System with multi-cluster should difine their own exact value.
136 	hex "Secure address for PSCI image"
140 	  If not defined, the PSCI sections are placed together with the u-boot
142 	  places such as some secure RAM built-in SOC etc.
152 	bool "SHA-1 digest algorithm (ARMv8 Crypto Extensions)"
156 	bool "SHA-256 digest algorithm (ARMv8 Crypto Extensions)"