88 static inline void zx_tdm_writel(struct zx_tdm_info *tdm, u16 reg, u32 val)  in zx_tdm_writel()  function
102 	zx_tdm_writel(tdm, REG_PROCESS_CTRL, val);  in zx_tdm_tx_en()
114 	zx_tdm_writel(tdm, REG_PROCESS_CTRL, val);  in zx_tdm_rx_en()
127 	zx_tdm_writel(tdm, REG_TX_FIFO_CTRL, val);  in zx_tdm_tx_dma_en()
140 	zx_tdm_writel(tdm, REG_RX_FIFO_CTRL, val);  in zx_tdm_rx_dma_en()
187 	zx_tdm_writel(tdm, REG_TIMING_CTRL, val);  in zx_tdm_set_fmt()
220 	zx_tdm_writel(tdm, REG_TIMING_CTRL, val);  in zx_tdm_hw_params()
221 	zx_tdm_writel(tdm, REG_TS_MASK0, mask);  in zx_tdm_hw_params()
243 			zx_tdm_writel(zx_tdm, REG_RX_FIFO_CTRL, val);  in zx_tdm_trigger()
249 			zx_tdm_writel(zx_tdm, REG_TX_FIFO_CTRL, val);  in zx_tdm_trigger()
326 	zx_tdm_writel(tdm, REG_PROCESS_CTRL, PROCESS_DISABLE_ALL);  in zx_tdm_init_state()
332 	zx_tdm_writel(tdm, REG_TIMING_CTRL, val);  in zx_tdm_init_state()
334 	zx_tdm_writel(tdm, REG_INT_EN, INT_DISABLE_ALL);  in zx_tdm_init_state()
338 	zx_tdm_writel(tdm, REG_INT_STATUS, INT_STATUS_MASK);  in zx_tdm_init_state()
339 	zx_tdm_writel(tdm, REG_RX_FIFO_CTRL, FIFOCTRL_RX_FIFO_RST);  in zx_tdm_init_state()
340 	zx_tdm_writel(tdm, REG_TX_FIFO_CTRL, FIFOCTRL_TX_FIFO_RST);  in zx_tdm_init_state()
345 	zx_tdm_writel(tdm, REG_RX_FIFO_CTRL, val);  in zx_tdm_init_state()
350 	zx_tdm_writel(tdm, REG_TX_FIFO_CTRL, val);  in zx_tdm_init_state()