Lines Matching +full:i2s +full:- +full:regs
1 // SPDX-License-Identifier: GPL-2.0-only
4 * ALSA SoC Audio Layer - Rockchip I2S Controller driver
7 * Author: Jianqun <jay.xu@rock-chips.com>
25 #define DRV_NAME "rockchip-i2s"
27 #define CLK_PPM_MIN (-1000)
53 * I2S controller hopes to start the tx and rx together,
73 struct rk_i2s_dev *i2s = dev_get_drvdata(dev); in i2s_runtime_suspend() local
75 regcache_cache_only(i2s->regmap, true); in i2s_runtime_suspend()
76 clk_disable_unprepare(i2s->mclk); in i2s_runtime_suspend()
83 struct rk_i2s_dev *i2s = dev_get_drvdata(dev); in i2s_runtime_resume() local
86 ret = clk_prepare_enable(i2s->mclk); in i2s_runtime_resume()
88 dev_err(i2s->dev, "clock enable failed %d\n", ret); in i2s_runtime_resume()
92 regcache_cache_only(i2s->regmap, false); in i2s_runtime_resume()
93 regcache_mark_dirty(i2s->regmap); in i2s_runtime_resume()
95 ret = regcache_sync(i2s->regmap); in i2s_runtime_resume()
97 clk_disable_unprepare(i2s->mclk); in i2s_runtime_resume()
107 static int rockchip_i2s_clear(struct rk_i2s_dev *i2s) in rockchip_i2s_clear() argument
125 if (!i2s->is_master_mode) in rockchip_i2s_clear()
126 regmap_update_bits(i2s->regmap, I2S_CKR, in rockchip_i2s_clear()
128 regmap_update_bits(i2s->regmap, I2S_CLR, clr, clr); in rockchip_i2s_clear()
130 ret = regmap_read_poll_timeout_atomic(i2s->regmap, I2S_CLR, val, in rockchip_i2s_clear()
132 if (!i2s->is_master_mode) in rockchip_i2s_clear()
133 regmap_update_bits(i2s->regmap, I2S_CKR, in rockchip_i2s_clear()
136 dev_warn(i2s->dev, "failed to clear fifo on %s mode\n", in rockchip_i2s_clear()
137 i2s->is_master_mode ? "master" : "slave"); in rockchip_i2s_clear()
142 static void rockchip_snd_txctrl(struct rk_i2s_dev *i2s, int on) in rockchip_snd_txctrl() argument
144 spin_lock(&i2s->lock); in rockchip_snd_txctrl()
146 regmap_update_bits(i2s->regmap, I2S_DMACR, in rockchip_snd_txctrl()
149 regmap_update_bits(i2s->regmap, I2S_XFER, in rockchip_snd_txctrl()
153 i2s->tx_start = true; in rockchip_snd_txctrl()
155 i2s->tx_start = false; in rockchip_snd_txctrl()
157 regmap_update_bits(i2s->regmap, I2S_DMACR, in rockchip_snd_txctrl()
160 if (!i2s->rx_start) { in rockchip_snd_txctrl()
161 regmap_update_bits(i2s->regmap, I2S_XFER, in rockchip_snd_txctrl()
168 rockchip_i2s_clear(i2s); in rockchip_snd_txctrl()
171 spin_unlock(&i2s->lock); in rockchip_snd_txctrl()
174 static void rockchip_snd_rxctrl(struct rk_i2s_dev *i2s, int on) in rockchip_snd_rxctrl() argument
176 spin_lock(&i2s->lock); in rockchip_snd_rxctrl()
178 regmap_update_bits(i2s->regmap, I2S_DMACR, in rockchip_snd_rxctrl()
181 regmap_update_bits(i2s->regmap, I2S_XFER, in rockchip_snd_rxctrl()
185 i2s->rx_start = true; in rockchip_snd_rxctrl()
187 i2s->rx_start = false; in rockchip_snd_rxctrl()
189 regmap_update_bits(i2s->regmap, I2S_DMACR, in rockchip_snd_rxctrl()
192 if (!i2s->tx_start) { in rockchip_snd_rxctrl()
193 regmap_update_bits(i2s->regmap, I2S_XFER, in rockchip_snd_rxctrl()
200 rockchip_i2s_clear(i2s); in rockchip_snd_rxctrl()
203 spin_unlock(&i2s->lock); in rockchip_snd_rxctrl()
209 struct rk_i2s_dev *i2s = to_info(cpu_dai); in rockchip_i2s_set_fmt() local
213 pm_runtime_get_sync(cpu_dai->dev); in rockchip_i2s_set_fmt()
219 i2s->is_master_mode = true; in rockchip_i2s_set_fmt()
223 i2s->is_master_mode = false; in rockchip_i2s_set_fmt()
226 ret = -EINVAL; in rockchip_i2s_set_fmt()
230 regmap_update_bits(i2s->regmap, I2S_CKR, mask, val); in rockchip_i2s_set_fmt()
255 ret = -EINVAL; in rockchip_i2s_set_fmt()
259 regmap_update_bits(i2s->regmap, I2S_CKR, mask, val); in rockchip_i2s_set_fmt()
279 ret = -EINVAL; in rockchip_i2s_set_fmt()
283 regmap_update_bits(i2s->regmap, I2S_TXCR, mask, val); in rockchip_i2s_set_fmt()
303 ret = -EINVAL; in rockchip_i2s_set_fmt()
307 regmap_update_bits(i2s->regmap, I2S_RXCR, mask, val); in rockchip_i2s_set_fmt()
310 pm_runtime_put(cpu_dai->dev); in rockchip_i2s_set_fmt()
319 struct rk_i2s_dev *i2s = to_info(dai); in rockchip_i2s_hw_params() local
323 if (i2s->is_master_mode) { in rockchip_i2s_hw_params()
324 mclk_rate = clk_get_rate(i2s->mclk); in rockchip_i2s_hw_params()
325 bclk_rate = i2s->bclk_ratio * params_rate(params); in rockchip_i2s_hw_params()
327 return -EINVAL; in rockchip_i2s_hw_params()
331 regmap_update_bits(i2s->regmap, I2S_CKR, in rockchip_i2s_hw_params()
335 regmap_update_bits(i2s->regmap, I2S_CKR, in rockchip_i2s_hw_params()
360 return -EINVAL; in rockchip_i2s_hw_params()
377 dev_err(i2s->dev, "invalid channel: %d\n", in rockchip_i2s_hw_params()
379 return -EINVAL; in rockchip_i2s_hw_params()
382 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) in rockchip_i2s_hw_params()
383 regmap_update_bits(i2s->regmap, I2S_RXCR, in rockchip_i2s_hw_params()
387 regmap_update_bits(i2s->regmap, I2S_TXCR, in rockchip_i2s_hw_params()
391 if (!IS_ERR(i2s->grf) && i2s->pins) { in rockchip_i2s_hw_params()
392 regmap_read(i2s->regmap, I2S_TXCR, &val); in rockchip_i2s_hw_params()
410 val <<= i2s->pins->shift; in rockchip_i2s_hw_params()
411 val |= (I2S_IO_DIRECTION_MASK << i2s->pins->shift) << 16; in rockchip_i2s_hw_params()
412 regmap_write(i2s->grf, i2s->pins->reg_offset, val); in rockchip_i2s_hw_params()
415 regmap_update_bits(i2s->regmap, I2S_DMACR, I2S_DMACR_TDL_MASK, in rockchip_i2s_hw_params()
417 regmap_update_bits(i2s->regmap, I2S_DMACR, I2S_DMACR_RDL_MASK, in rockchip_i2s_hw_params()
426 struct rk_i2s_dev *i2s = to_info(dai); in rockchip_i2s_trigger() local
433 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) in rockchip_i2s_trigger()
434 rockchip_snd_rxctrl(i2s, 1); in rockchip_i2s_trigger()
436 rockchip_snd_txctrl(i2s, 1); in rockchip_i2s_trigger()
441 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) in rockchip_i2s_trigger()
442 rockchip_snd_rxctrl(i2s, 0); in rockchip_i2s_trigger()
444 rockchip_snd_txctrl(i2s, 0); in rockchip_i2s_trigger()
447 ret = -EINVAL; in rockchip_i2s_trigger()
457 struct rk_i2s_dev *i2s = to_info(dai); in rockchip_i2s_set_bclk_ratio() local
459 i2s->bclk_ratio = ratio; in rockchip_i2s_set_bclk_ratio()
464 static int rockchip_i2s_clk_set_rate(struct rk_i2s_dev *i2s, in rockchip_i2s_clk_set_rate() argument
471 if (ppm == i2s->clk_ppm) in rockchip_i2s_clk_set_rate()
475 if (ret != -ENOSYS) in rockchip_i2s_clk_set_rate()
478 delta = (ppm < 0) ? -1 : 1; in rockchip_i2s_clk_set_rate()
484 return -EINVAL; in rockchip_i2s_clk_set_rate()
491 i2s->clk_ppm = ppm; in rockchip_i2s_clk_set_rate()
499 struct rk_i2s_dev *i2s = to_info(cpu_dai); in rockchip_i2s_set_sysclk() local
507 if (i2s->mclk_calibrate) { in rockchip_i2s_set_sysclk()
508 ret = rockchip_i2s_clk_set_rate(i2s, i2s->mclk_root, in rockchip_i2s_set_sysclk()
509 i2s->mclk_root_rate, 0); in rockchip_i2s_set_sysclk()
513 root_rate = i2s->mclk_root_rate; in rockchip_i2s_set_sysclk()
514 delta = abs(root_rate % rate - rate); in rockchip_i2s_set_sysclk()
518 div = DIV_ROUND_CLOSEST(i2s->mclk_root_initial_rate, rate); in rockchip_i2s_set_sysclk()
520 return -EINVAL; in rockchip_i2s_set_sysclk()
523 ret = clk_set_rate(i2s->mclk_root, root_rate); in rockchip_i2s_set_sysclk()
527 i2s->mclk_root_rate = clk_get_rate(i2s->mclk_root); in rockchip_i2s_set_sysclk()
531 ret = clk_set_rate(i2s->mclk, rate); in rockchip_i2s_set_sysclk()
533 dev_err(i2s->dev, "Fail to set mclk %d\n", ret); in rockchip_i2s_set_sysclk()
541 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; in rockchip_i2s_clk_compensation_info()
542 uinfo->count = 1; in rockchip_i2s_clk_compensation_info()
543 uinfo->value.integer.min = CLK_PPM_MIN; in rockchip_i2s_clk_compensation_info()
544 uinfo->value.integer.max = CLK_PPM_MAX; in rockchip_i2s_clk_compensation_info()
545 uinfo->value.integer.step = 1; in rockchip_i2s_clk_compensation_info()
554 struct rk_i2s_dev *i2s = snd_soc_dai_get_drvdata(dai); in rockchip_i2s_clk_compensation_get() local
556 ucontrol->value.integer.value[0] = i2s->clk_ppm; in rockchip_i2s_clk_compensation_get()
565 struct rk_i2s_dev *i2s = snd_soc_dai_get_drvdata(dai); in rockchip_i2s_clk_compensation_put() local
566 int ppm = ucontrol->value.integer.value[0]; in rockchip_i2s_clk_compensation_put()
568 if ((ucontrol->value.integer.value[0] < CLK_PPM_MIN) || in rockchip_i2s_clk_compensation_put()
569 (ucontrol->value.integer.value[0] > CLK_PPM_MAX)) in rockchip_i2s_clk_compensation_put()
570 return -EINVAL; in rockchip_i2s_clk_compensation_put()
572 return rockchip_i2s_clk_set_rate(i2s, i2s->mclk_root, i2s->mclk_root_rate, ppm); in rockchip_i2s_clk_compensation_put()
585 struct rk_i2s_dev *i2s = snd_soc_dai_get_drvdata(dai); in rockchip_i2s_dai_probe() local
588 i2s->has_playback ? &i2s->playback_dma_data : NULL, in rockchip_i2s_dai_probe()
589 i2s->has_capture ? &i2s->capture_dma_data : NULL); in rockchip_i2s_dai_probe()
591 if (i2s->mclk_calibrate) in rockchip_i2s_dai_probe()
704 { .compatible = "rockchip,px30-i2s", },
707 { .compatible = "rockchip,rk1808-i2s", },
710 { .compatible = "rockchip,rk3036-i2s", },
712 { .compatible = "rockchip,rk3066-i2s", },
714 { .compatible = "rockchip,rk3128-i2s", },
717 { .compatible = "rockchip,rk3188-i2s", },
720 { .compatible = "rockchip,rk3228-i2s", },
723 { .compatible = "rockchip,rk3288-i2s", },
726 { .compatible = "rockchip,rk3308-i2s", },
729 { .compatible = "rockchip,rk3328-i2s", },
732 { .compatible = "rockchip,rk3366-i2s", },
735 { .compatible = "rockchip,rk3368-i2s", },
738 { .compatible = "rockchip,rk3399-i2s", .data = &rk3399_i2s_pins },
741 { .compatible = "rockchip,rv1126-i2s", },
746 static int rockchip_i2s_init_dai(struct rk_i2s_dev *i2s, struct resource *res, in rockchip_i2s_init_dai() argument
749 struct device_node *node = i2s->dev->of_node; in rockchip_i2s_init_dai()
755 of_property_for_each_string(node, "dma-names", dma_names, dma_name) { in rockchip_i2s_init_dai()
757 i2s->has_playback = true; in rockchip_i2s_init_dai()
759 i2s->has_capture = true; in rockchip_i2s_init_dai()
762 dai = devm_kmemdup(i2s->dev, &rockchip_i2s_dai, in rockchip_i2s_init_dai()
765 return -ENOMEM; in rockchip_i2s_init_dai()
767 if (i2s->has_playback) { in rockchip_i2s_init_dai()
768 dai->playback.stream_name = "Playback"; in rockchip_i2s_init_dai()
769 dai->playback.channels_min = 2; in rockchip_i2s_init_dai()
770 dai->playback.channels_max = 8; in rockchip_i2s_init_dai()
771 dai->playback.rates = SNDRV_PCM_RATE_8000_192000; in rockchip_i2s_init_dai()
772 dai->playback.formats = SNDRV_PCM_FMTBIT_S8 | in rockchip_i2s_init_dai()
779 i2s->playback_dma_data.addr = res->start + I2S_TXDR; in rockchip_i2s_init_dai()
780 i2s->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; in rockchip_i2s_init_dai()
781 i2s->playback_dma_data.maxburst = 8; in rockchip_i2s_init_dai()
783 if (!of_property_read_u32(node, "rockchip,playback-channels", &val)) { in rockchip_i2s_init_dai()
785 dai->playback.channels_max = val; in rockchip_i2s_init_dai()
789 if (i2s->has_capture) { in rockchip_i2s_init_dai()
790 dai->capture.stream_name = "Capture"; in rockchip_i2s_init_dai()
791 dai->capture.channels_min = 2; in rockchip_i2s_init_dai()
792 dai->capture.channels_max = 8; in rockchip_i2s_init_dai()
793 dai->capture.rates = SNDRV_PCM_RATE_8000_192000; in rockchip_i2s_init_dai()
794 dai->capture.formats = SNDRV_PCM_FMTBIT_S8 | in rockchip_i2s_init_dai()
801 i2s->capture_dma_data.addr = res->start + I2S_RXDR; in rockchip_i2s_init_dai()
802 i2s->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; in rockchip_i2s_init_dai()
803 i2s->capture_dma_data.maxburst = 8; in rockchip_i2s_init_dai()
805 if (!of_property_read_u32(node, "rockchip,capture-channels", &val)) { in rockchip_i2s_init_dai()
807 dai->capture.channels_max = val; in rockchip_i2s_init_dai()
811 i2s->clk_trcm = I2S_CKR_TRCM_TXRX; in rockchip_i2s_init_dai()
812 if (!of_property_read_u32(node, "rockchip,clk-trcm", &val)) { in rockchip_i2s_init_dai()
814 i2s->clk_trcm = val << I2S_CKR_TRCM_SHIFT; in rockchip_i2s_init_dai()
815 if (i2s->clk_trcm) in rockchip_i2s_init_dai()
816 dai->symmetric_rates = 1; in rockchip_i2s_init_dai()
820 regmap_update_bits(i2s->regmap, I2S_CKR, in rockchip_i2s_init_dai()
821 I2S_CKR_TRCM_MASK, i2s->clk_trcm); in rockchip_i2s_init_dai()
831 struct device_node *node = pdev->dev.of_node; in rockchip_i2s_probe()
833 struct rk_i2s_dev *i2s; in rockchip_i2s_probe() local
836 void __iomem *regs; in rockchip_i2s_probe() local
839 i2s = devm_kzalloc(&pdev->dev, sizeof(*i2s), GFP_KERNEL); in rockchip_i2s_probe()
840 if (!i2s) in rockchip_i2s_probe()
841 return -ENOMEM; in rockchip_i2s_probe()
843 spin_lock_init(&i2s->lock); in rockchip_i2s_probe()
844 i2s->dev = &pdev->dev; in rockchip_i2s_probe()
846 i2s->grf = syscon_regmap_lookup_by_phandle(node, "rockchip,grf"); in rockchip_i2s_probe()
847 if (!IS_ERR(i2s->grf)) { in rockchip_i2s_probe()
848 of_id = of_match_device(rockchip_i2s_match, &pdev->dev); in rockchip_i2s_probe()
849 if (!of_id || !of_id->data) in rockchip_i2s_probe()
850 return -EINVAL; in rockchip_i2s_probe()
852 i2s->pins = of_id->data; in rockchip_i2s_probe()
855 regs = devm_platform_get_and_ioremap_resource(pdev, 0, &res); in rockchip_i2s_probe()
856 if (IS_ERR(regs)) in rockchip_i2s_probe()
857 return PTR_ERR(regs); in rockchip_i2s_probe()
859 i2s->regmap = devm_regmap_init_mmio(&pdev->dev, regs, in rockchip_i2s_probe()
861 if (IS_ERR(i2s->regmap)) { in rockchip_i2s_probe()
862 dev_err(&pdev->dev, in rockchip_i2s_probe()
864 return PTR_ERR(i2s->regmap); in rockchip_i2s_probe()
867 i2s->bclk_ratio = 64; in rockchip_i2s_probe()
869 dev_set_drvdata(&pdev->dev, i2s); in rockchip_i2s_probe()
871 i2s->mclk_calibrate = in rockchip_i2s_probe()
872 of_property_read_bool(node, "rockchip,mclk-calibrate"); in rockchip_i2s_probe()
873 if (i2s->mclk_calibrate) { in rockchip_i2s_probe()
874 i2s->mclk_root = devm_clk_get(&pdev->dev, "i2s_clk_root"); in rockchip_i2s_probe()
875 if (IS_ERR(i2s->mclk_root)) in rockchip_i2s_probe()
876 return PTR_ERR(i2s->mclk_root); in rockchip_i2s_probe()
878 i2s->mclk_root_initial_rate = clk_get_rate(i2s->mclk_root); in rockchip_i2s_probe()
879 i2s->mclk_root_rate = i2s->mclk_root_initial_rate; in rockchip_i2s_probe()
882 i2s->mclk = devm_clk_get(&pdev->dev, "i2s_clk"); in rockchip_i2s_probe()
883 if (IS_ERR(i2s->mclk)) { in rockchip_i2s_probe()
884 dev_err(&pdev->dev, "Can't retrieve i2s master clock\n"); in rockchip_i2s_probe()
885 return PTR_ERR(i2s->mclk); in rockchip_i2s_probe()
889 i2s->hclk = devm_clk_get(&pdev->dev, "i2s_hclk"); in rockchip_i2s_probe()
890 if (IS_ERR(i2s->hclk)) { in rockchip_i2s_probe()
891 dev_err(&pdev->dev, "Can't retrieve i2s bus clock\n"); in rockchip_i2s_probe()
892 return PTR_ERR(i2s->hclk); in rockchip_i2s_probe()
894 ret = clk_prepare_enable(i2s->hclk); in rockchip_i2s_probe()
896 dev_err(i2s->dev, "hclock enable failed %d\n", ret); in rockchip_i2s_probe()
900 pm_runtime_enable(&pdev->dev); in rockchip_i2s_probe()
901 if (!pm_runtime_enabled(&pdev->dev)) { in rockchip_i2s_probe()
902 ret = i2s_runtime_resume(&pdev->dev); in rockchip_i2s_probe()
907 ret = rockchip_i2s_init_dai(i2s, res, &dai); in rockchip_i2s_probe()
911 ret = devm_snd_soc_register_component(&pdev->dev, in rockchip_i2s_probe()
916 dev_err(&pdev->dev, "Could not register DAI\n"); in rockchip_i2s_probe()
920 if (of_property_read_bool(node, "rockchip,no-dmaengine")) { in rockchip_i2s_probe()
921 dev_info(&pdev->dev, "Used for Multi-DAI\n"); in rockchip_i2s_probe()
925 ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0); in rockchip_i2s_probe()
927 dev_err(&pdev->dev, "Could not register PCM\n"); in rockchip_i2s_probe()
934 if (!pm_runtime_status_suspended(&pdev->dev)) in rockchip_i2s_probe()
935 i2s_runtime_suspend(&pdev->dev); in rockchip_i2s_probe()
937 pm_runtime_disable(&pdev->dev); in rockchip_i2s_probe()
939 clk_disable_unprepare(i2s->hclk); in rockchip_i2s_probe()
946 struct rk_i2s_dev *i2s = dev_get_drvdata(&pdev->dev); in rockchip_i2s_remove() local
948 pm_runtime_disable(&pdev->dev); in rockchip_i2s_remove()
949 if (!pm_runtime_status_suspended(&pdev->dev)) in rockchip_i2s_remove()
950 i2s_runtime_suspend(&pdev->dev); in rockchip_i2s_remove()
952 clk_disable_unprepare(i2s->hclk); in rockchip_i2s_remove()
974 MODULE_AUTHOR("jianqun <jay.xu@rock-chips.com>");