Lines Matching refs:ichdev
331 struct ichdev { struct
374 struct ichdev ichd[6]; argument
657 static void snd_intel8x0_setup_periods(struct intel8x0 *chip, struct ichdev *ichdev) in snd_intel8x0_setup_periods() argument
660 __le32 *bdbar = ichdev->bdbar; in snd_intel8x0_setup_periods()
661 unsigned long port = ichdev->reg_offset; in snd_intel8x0_setup_periods()
663 iputdword(chip, port + ICH_REG_OFF_BDBAR, ichdev->bdbar_addr); in snd_intel8x0_setup_periods()
664 if (ichdev->size == ichdev->fragsize) { in snd_intel8x0_setup_periods()
665 ichdev->ack_reload = ichdev->ack = 2; in snd_intel8x0_setup_periods()
666 ichdev->fragsize1 = ichdev->fragsize >> 1; in snd_intel8x0_setup_periods()
668 bdbar[idx + 0] = cpu_to_le32(ichdev->physbuf); in snd_intel8x0_setup_periods()
670 ichdev->fragsize1 >> ichdev->pos_shift); in snd_intel8x0_setup_periods()
671 bdbar[idx + 2] = cpu_to_le32(ichdev->physbuf + (ichdev->size >> 1)); in snd_intel8x0_setup_periods()
673 ichdev->fragsize1 >> ichdev->pos_shift); in snd_intel8x0_setup_periods()
675 ichdev->frags = 2; in snd_intel8x0_setup_periods()
677 ichdev->ack_reload = ichdev->ack = 1; in snd_intel8x0_setup_periods()
678 ichdev->fragsize1 = ichdev->fragsize; in snd_intel8x0_setup_periods()
680 bdbar[idx + 0] = cpu_to_le32(ichdev->physbuf + in snd_intel8x0_setup_periods()
681 (((idx >> 1) * ichdev->fragsize) % in snd_intel8x0_setup_periods()
682 ichdev->size)); in snd_intel8x0_setup_periods()
684 ichdev->fragsize >> ichdev->pos_shift); in snd_intel8x0_setup_periods()
690 ichdev->frags = ichdev->size / ichdev->fragsize; in snd_intel8x0_setup_periods()
692 iputbyte(chip, port + ICH_REG_OFF_LVI, ichdev->lvi = ICH_REG_LVI_MASK); in snd_intel8x0_setup_periods()
693 ichdev->civ = 0; in snd_intel8x0_setup_periods()
695 ichdev->lvi_frag = ICH_REG_LVI_MASK % ichdev->frags; in snd_intel8x0_setup_periods()
696 ichdev->position = 0; in snd_intel8x0_setup_periods()
700 ichdev->lvi_frag, ichdev->frags, ichdev->fragsize, in snd_intel8x0_setup_periods()
701 ichdev->fragsize1); in snd_intel8x0_setup_periods()
704 iputbyte(chip, port + ichdev->roff_sr, ICH_FIFOE | ICH_BCIS | ICH_LVBCI); in snd_intel8x0_setup_periods()
711 static inline void snd_intel8x0_update(struct intel8x0 *chip, struct ichdev *ichdev) in snd_intel8x0_update() argument
713 unsigned long port = ichdev->reg_offset; in snd_intel8x0_update()
718 if (!(ichdev->prepared || chip->in_measurement) || ichdev->suspended) in snd_intel8x0_update()
722 status = igetbyte(chip, port + ichdev->roff_sr); in snd_intel8x0_update()
726 } else if (civ == ichdev->civ) { in snd_intel8x0_update()
729 ichdev->civ++; in snd_intel8x0_update()
730 ichdev->civ &= ICH_REG_LVI_MASK; in snd_intel8x0_update()
732 step = civ - ichdev->civ; in snd_intel8x0_update()
737 ichdev->civ = civ; in snd_intel8x0_update()
740 ichdev->position += step * ichdev->fragsize1; in snd_intel8x0_update()
742 ichdev->position %= ichdev->size; in snd_intel8x0_update()
743 ichdev->lvi += step; in snd_intel8x0_update()
744 ichdev->lvi &= ICH_REG_LVI_MASK; in snd_intel8x0_update()
745 iputbyte(chip, port + ICH_REG_OFF_LVI, ichdev->lvi); in snd_intel8x0_update()
747 ichdev->lvi_frag++; in snd_intel8x0_update()
748 ichdev->lvi_frag %= ichdev->frags; in snd_intel8x0_update()
749 …ichdev->bdbar[ichdev->lvi * 2] = cpu_to_le32(ichdev->physbuf + ichdev->lvi_frag * ichdev->fragsize… in snd_intel8x0_update()
753 ichdev->lvi * 2, ichdev->bdbar[ichdev->lvi * 2], in snd_intel8x0_update()
754 ichdev->bdbar[ichdev->lvi * 2 + 1], inb(ICH_REG_OFF_PIV + port), in snd_intel8x0_update()
757 if (--ichdev->ack == 0) { in snd_intel8x0_update()
758 ichdev->ack = ichdev->ack_reload; in snd_intel8x0_update()
763 if (ack && ichdev->substream) { in snd_intel8x0_update()
764 snd_pcm_period_elapsed(ichdev->substream); in snd_intel8x0_update()
766 iputbyte(chip, port + ichdev->roff_sr, in snd_intel8x0_update()
773 struct ichdev *ichdev; in snd_intel8x0_interrupt() local
792 ichdev = &chip->ichd[i]; in snd_intel8x0_interrupt()
793 if (status & ichdev->int_sta_mask) in snd_intel8x0_interrupt()
794 snd_intel8x0_update(chip, ichdev); in snd_intel8x0_interrupt()
810 struct ichdev *ichdev = get_ichdev(substream); in snd_intel8x0_pcm_trigger() local
812 unsigned long port = ichdev->reg_offset; in snd_intel8x0_pcm_trigger()
816 ichdev->suspended = 0; in snd_intel8x0_pcm_trigger()
821 ichdev->last_pos = ichdev->position; in snd_intel8x0_pcm_trigger()
824 ichdev->suspended = 1; in snd_intel8x0_pcm_trigger()
838 while (!(igetbyte(chip, port + ichdev->roff_sr) & ICH_DCH)) ; in snd_intel8x0_pcm_trigger()
848 struct ichdev *ichdev = get_ichdev(substream); in snd_intel8x0_ali_trigger() local
849 unsigned long port = ichdev->reg_offset; in snd_intel8x0_ali_trigger()
858 ichdev->suspended = 0; in snd_intel8x0_ali_trigger()
864 fifo = igetdword(chip, fiforeg[ichdev->ali_slot / 4]); in snd_intel8x0_ali_trigger()
865 fifo &= ~(0xff << (ichdev->ali_slot % 4)); in snd_intel8x0_ali_trigger()
866 fifo |= 0x83 << (ichdev->ali_slot % 4); in snd_intel8x0_ali_trigger()
867 iputdword(chip, fiforeg[ichdev->ali_slot / 4], fifo); in snd_intel8x0_ali_trigger()
870 val &= ~(1 << (ichdev->ali_slot + 16)); /* clear PAUSE flag */ in snd_intel8x0_ali_trigger()
872 iputdword(chip, ICHREG(ALI_DMACR), val | (1 << ichdev->ali_slot)); in snd_intel8x0_ali_trigger()
875 ichdev->suspended = 1; in snd_intel8x0_ali_trigger()
880 iputdword(chip, ICHREG(ALI_DMACR), val | (1 << (ichdev->ali_slot + 16))); in snd_intel8x0_ali_trigger()
892 igetdword(chip, ICHREG(ALI_INTERRUPTSR)) & ichdev->int_sta_mask); in snd_intel8x0_ali_trigger()
904 struct ichdev *ichdev = get_ichdev(substream); in snd_intel8x0_hw_params() local
908 if (ichdev->pcm_open_flag) { in snd_intel8x0_hw_params()
909 snd_ac97_pcm_close(ichdev->pcm); in snd_intel8x0_hw_params()
910 ichdev->pcm_open_flag = 0; in snd_intel8x0_hw_params()
911 ichdev->prepared = 0; in snd_intel8x0_hw_params()
913 err = snd_ac97_pcm_open(ichdev->pcm, params_rate(hw_params), in snd_intel8x0_hw_params()
915 ichdev->pcm->r[dbl].slots); in snd_intel8x0_hw_params()
917 ichdev->pcm_open_flag = 1; in snd_intel8x0_hw_params()
919 if (ichdev->ichd == ICHD_PCMOUT && chip->spdif_idx < 0) in snd_intel8x0_hw_params()
920 snd_ac97_set_rate(ichdev->pcm->r[0].codec[0], AC97_SPDIF, in snd_intel8x0_hw_params()
928 struct ichdev *ichdev = get_ichdev(substream); in snd_intel8x0_hw_free() local
930 if (ichdev->pcm_open_flag) { in snd_intel8x0_hw_free()
931 snd_ac97_pcm_close(ichdev->pcm); in snd_intel8x0_hw_free()
932 ichdev->pcm_open_flag = 0; in snd_intel8x0_hw_free()
933 ichdev->prepared = 0; in snd_intel8x0_hw_free()
997 struct ichdev *ichdev = get_ichdev(substream); in snd_intel8x0_pcm_prepare() local
999 ichdev->physbuf = runtime->dma_addr; in snd_intel8x0_pcm_prepare()
1000 ichdev->size = snd_pcm_lib_buffer_bytes(substream); in snd_intel8x0_pcm_prepare()
1001 ichdev->fragsize = snd_pcm_lib_period_bytes(substream); in snd_intel8x0_pcm_prepare()
1002 if (ichdev->ichd == ICHD_PCMOUT) { in snd_intel8x0_pcm_prepare()
1005 ichdev->pos_shift = (runtime->sample_bits > 16) ? 2 : 1; in snd_intel8x0_pcm_prepare()
1007 snd_intel8x0_setup_periods(chip, ichdev); in snd_intel8x0_pcm_prepare()
1008 ichdev->prepared = 1; in snd_intel8x0_pcm_prepare()
1015 struct ichdev *ichdev = get_ichdev(substream); in snd_intel8x0_pcm_pointer() local
1022 civ = igetbyte(chip, ichdev->reg_offset + ICH_REG_OFF_CIV); in snd_intel8x0_pcm_pointer()
1023 ptr1 = igetword(chip, ichdev->reg_offset + ichdev->roff_picb); in snd_intel8x0_pcm_pointer()
1024 position = ichdev->position; in snd_intel8x0_pcm_pointer()
1029 if (civ != igetbyte(chip, ichdev->reg_offset + ICH_REG_OFF_CIV)) in snd_intel8x0_pcm_pointer()
1040 if (ptr1 == igetword(chip, ichdev->reg_offset + ichdev->roff_picb)) in snd_intel8x0_pcm_pointer()
1043 ptr = ichdev->last_pos; in snd_intel8x0_pcm_pointer()
1045 ptr1 <<= ichdev->pos_shift; in snd_intel8x0_pcm_pointer()
1046 ptr = ichdev->fragsize1 - ptr1; in snd_intel8x0_pcm_pointer()
1048 if (ptr < ichdev->last_pos) { in snd_intel8x0_pcm_pointer()
1050 pos_base = position / ichdev->fragsize1; in snd_intel8x0_pcm_pointer()
1051 last_base = ichdev->last_pos / ichdev->fragsize1; in snd_intel8x0_pcm_pointer()
1056 ptr = ichdev->last_pos; in snd_intel8x0_pcm_pointer()
1059 ichdev->last_pos = ptr; in snd_intel8x0_pcm_pointer()
1061 if (ptr >= ichdev->size) in snd_intel8x0_pcm_pointer()
1117 static int snd_intel8x0_pcm_open(struct snd_pcm_substream *substream, struct ichdev *ichdev) in snd_intel8x0_pcm_open() argument
1123 ichdev->substream = substream; in snd_intel8x0_pcm_open()
1125 runtime->hw.rates = ichdev->pcm->rates; in snd_intel8x0_pcm_open()
1133 runtime->private_data = ichdev; in snd_intel8x0_pcm_open()
2640 struct ichdev *ichdev = &chip->ichd[i]; in intel8x0_resume() local
2641 unsigned long port = ichdev->reg_offset; in intel8x0_resume()
2642 if (! ichdev->substream || ! ichdev->suspended) in intel8x0_resume()
2644 if (ichdev->ichd == ICHD_PCMOUT) in intel8x0_resume()
2645 snd_intel8x0_setup_pcm_out(chip, ichdev->substream->runtime); in intel8x0_resume()
2646 iputdword(chip, port + ICH_REG_OFF_BDBAR, ichdev->bdbar_addr); in intel8x0_resume()
2647 iputbyte(chip, port + ICH_REG_OFF_LVI, ichdev->lvi); in intel8x0_resume()
2648 iputbyte(chip, port + ICH_REG_OFF_CIV, ichdev->civ); in intel8x0_resume()
2649 iputbyte(chip, port + ichdev->roff_sr, ICH_FIFOE | ICH_BCIS | ICH_LVBCI); in intel8x0_resume()
2667 struct ichdev *ichdev; in intel8x0_measure_ac97_clock() local
2683 ichdev = &chip->ichd[ICHD_PCMOUT]; in intel8x0_measure_ac97_clock()
2684 ichdev->physbuf = subs->dma_buffer.addr; in intel8x0_measure_ac97_clock()
2685 ichdev->size = ichdev->fragsize = INTEL8X0_TESTBUF_SIZE; in intel8x0_measure_ac97_clock()
2686 ichdev->substream = NULL; /* don't process interrupts */ in intel8x0_measure_ac97_clock()
2694 snd_intel8x0_setup_periods(chip, ichdev); in intel8x0_measure_ac97_clock()
2695 port = ichdev->reg_offset; in intel8x0_measure_ac97_clock()
2703 iputdword(chip, ICHREG(ALI_DMACR), 1 << ichdev->ali_slot); in intel8x0_measure_ac97_clock()
2711 civ = igetbyte(chip, ichdev->reg_offset + ICH_REG_OFF_CIV); in intel8x0_measure_ac97_clock()
2712 pos1 = igetword(chip, ichdev->reg_offset + ichdev->roff_picb); in intel8x0_measure_ac97_clock()
2717 if (civ == igetbyte(chip, ichdev->reg_offset + ICH_REG_OFF_CIV) && in intel8x0_measure_ac97_clock()
2718 pos1 == igetword(chip, ichdev->reg_offset + ichdev->roff_picb)) in intel8x0_measure_ac97_clock()
2724 pos = ichdev->fragsize1; in intel8x0_measure_ac97_clock()
2725 pos -= pos1 << ichdev->pos_shift; in intel8x0_measure_ac97_clock()
2726 pos += ichdev->position; in intel8x0_measure_ac97_clock()
2732 iputdword(chip, ICHREG(ALI_DMACR), 1 << (ichdev->ali_slot + 16)); in intel8x0_measure_ac97_clock()
2738 while (!(igetbyte(chip, port + ichdev->roff_sr) & ICH_DCH)) in intel8x0_measure_ac97_clock()
2906 struct ichdev *ichdev; in snd_intel8x0_create() local
3023 ichdev = &chip->ichd[i]; in snd_intel8x0_create()
3024 ichdev->ichd = i; in snd_intel8x0_create()
3025 ichdev->reg_offset = tbl[i].offset; in snd_intel8x0_create()
3026 ichdev->int_sta_mask = tbl[i].int_sta_mask; in snd_intel8x0_create()
3029 ichdev->roff_sr = ICH_REG_OFF_PICB; in snd_intel8x0_create()
3030 ichdev->roff_picb = ICH_REG_OFF_SR; in snd_intel8x0_create()
3032 ichdev->roff_sr = ICH_REG_OFF_SR; in snd_intel8x0_create()
3033 ichdev->roff_picb = ICH_REG_OFF_PICB; in snd_intel8x0_create()
3036 ichdev->ali_slot = (ichdev->reg_offset - 0x40) / 0x10; in snd_intel8x0_create()
3038 ichdev->pos_shift = (device_type == DEVICE_SIS) ? 0 : 1; in snd_intel8x0_create()
3054 ichdev = &chip->ichd[i]; in snd_intel8x0_create()
3055 ichdev->bdbar = ((__le32 *)chip->bdbars.area) + in snd_intel8x0_create()
3057 ichdev->bdbar_addr = chip->bdbars.addr + in snd_intel8x0_create()
3059 int_sta_masks |= ichdev->int_sta_mask; in snd_intel8x0_create()