206 #define BA0_CLKCR1		0x0400	/* Clock Control Register 1 */  macro
1274 	snd_cs4281_pokeBA0(chip, BA0_CLKCR1, 0);  in snd_cs4281_free()
1420 	snd_cs4281_pokeBA0(chip, BA0_CLKCR1, 0);  in snd_cs4281_chip_init()
1450 	snd_cs4281_pokeBA0(chip, BA0_CLKCR1, BA0_CLKCR1_DLLP);  in snd_cs4281_chip_init()
1452 	snd_cs4281_pokeBA0(chip, BA0_CLKCR1, BA0_CLKCR1_SWCE | BA0_CLKCR1_DLLP);  in snd_cs4281_chip_init()
1463 		if (snd_cs4281_peekBA0(chip, BA0_CLKCR1) & BA0_CLKCR1_DLLRDY)  in snd_cs4281_chip_init()
1971 	ulCLK = snd_cs4281_peekBA0(chip, BA0_CLKCR1);  in cs4281_suspend()
1973 	snd_cs4281_pokeBA0(chip, BA0_CLKCR1, ulCLK);  in cs4281_suspend()
1990 	snd_cs4281_pokeBA0(chip, BA0_CLKCR1, 0);  in cs4281_suspend()
1995 	ulCLK = snd_cs4281_peekBA0(chip, BA0_CLKCR1);  in cs4281_suspend()
1997 	snd_cs4281_pokeBA0(chip, BA0_CLKCR1, ulCLK);  in cs4281_suspend()
2008 	ulCLK = snd_cs4281_peekBA0(chip, BA0_CLKCR1);  in cs4281_resume()
2010 	snd_cs4281_pokeBA0(chip, BA0_CLKCR1, ulCLK);  in cs4281_resume()
2022 	ulCLK = snd_cs4281_peekBA0(chip, BA0_CLKCR1);  in cs4281_resume()
2024 	snd_cs4281_pokeBA0(chip, BA0_CLKCR1, ulCLK);  in cs4281_resume()