99 #define CM_REG_CHFORMAT		0x08  macro
737 			snd_cmipci_set_bit(cm, CM_REG_CHFORMAT, CM_CHB3D5C);  in set_dac_channels()
740 			snd_cmipci_clear_bit(cm, CM_REG_CHFORMAT, CM_CHB3D5C);  in set_dac_channels()
744 			snd_cmipci_set_bit(cm, CM_REG_CHFORMAT, CM_CHB3D);  in set_dac_channels()
746 			snd_cmipci_clear_bit(cm, CM_REG_CHFORMAT, CM_CHB3D);  in set_dac_channels()
831 	val = snd_cmipci_read(cm, CM_REG_CHFORMAT);  in snd_cmipci_pcm_prepare()
843 	snd_cmipci_write(cm, CM_REG_CHFORMAT, val);  in snd_cmipci_pcm_prepare()
1182 		snd_cmipci_set_bit(cm, CM_REG_CHFORMAT, CM_AC3EN1);  in setup_ac3()
1189 			snd_cmipci_set_bit(cm, CM_REG_CHFORMAT, CM_SPD24SEL);  in setup_ac3()
1197 					snd_cmipci_set_bit(cm, CM_REG_CHFORMAT, CM_PLAYBACK_SRATE_176K);  in setup_ac3()
1199 					snd_cmipci_clear_bit(cm, CM_REG_CHFORMAT, CM_PLAYBACK_SRATE_176K);  in setup_ac3()
1205 		snd_cmipci_clear_bit(cm, CM_REG_CHFORMAT, CM_AC3EN1);  in setup_ac3()
1212 				snd_cmipci_set_bit(cm, CM_REG_CHFORMAT, CM_SPD24SEL);  in setup_ac3()
1215 				snd_cmipci_clear_bit(cm, CM_REG_CHFORMAT, CM_SPD24SEL);  in setup_ac3()
1219 			snd_cmipci_clear_bit(cm, CM_REG_CHFORMAT, CM_SPD24SEL);  in setup_ac3()
1220 			snd_cmipci_clear_bit(cm, CM_REG_CHFORMAT, CM_PLAYBACK_SRATE_176K);  in setup_ac3()
1250 			snd_cmipci_set_bit(cm, CM_REG_CHFORMAT, CM_DBLSPDS);  in setup_spdif_playback()
1252 			snd_cmipci_clear_bit(cm, CM_REG_CHFORMAT, CM_DBLSPDS);  in setup_spdif_playback()
1257 		snd_cmipci_clear_bit(cm, CM_REG_CHFORMAT, CM_DBLSPDS);  in setup_spdif_playback()
1330 		val = snd_cmipci_read(cm, CM_REG_CHFORMAT);  in snd_cmipci_silence_hack()
1335 		snd_cmipci_write(cm, CM_REG_CHFORMAT, val);  in snd_cmipci_silence_hack()
1388 			snd_cmipci_set_bit(cm, CM_REG_CHFORMAT, CM_DBLSPDS);  in snd_cmipci_capture_spdif_prepare()
1390 			snd_cmipci_clear_bit(cm, CM_REG_CHFORMAT, CM_DBLSPDS);  in snd_cmipci_capture_spdif_prepare()
2405 DEFINE_BIT_SWITCH_ARG(spdif_in_sel1, CM_REG_CHFORMAT, CM_SPDIF_SELECT1, 0, 0);
2418 DEFINE_BIT_SWITCH_ARG(spdi_phase2, CM_REG_CHFORMAT, CM_SPDIF_INVERSE2, 0, 0);
2785 		detect = snd_cmipci_read(cm, CM_REG_CHFORMAT) & CM_CHIP_MASK1;  in query_chip()
3066 	snd_cmipci_write(cm, CM_REG_CHFORMAT, 0);  in snd_cmipci_create()
3292 	CM_REG_FUNCTRL1, CM_REG_CHFORMAT, CM_REG_LEGACY_CTRL, CM_REG_MISC_CTRL,