Lines Matching refs:snd_opl3sa2_write

200 static void snd_opl3sa2_write(struct snd_opl3sa2 *chip, unsigned char reg, unsigned char value)  in snd_opl3sa2_write()  function
246 snd_opl3sa2_write(chip, OPL3SA2_MISC, tmp ^ 7); in snd_opl3sa2_detect()
253 snd_opl3sa2_write(chip, OPL3SA2_MIC, 0x8a); in snd_opl3sa2_detect()
258 snd_opl3sa2_write(chip, OPL3SA2_MIC, 0x9f); in snd_opl3sa2_detect()
261 snd_opl3sa2_write(chip, OPL3SA2_PM_CTRL, OPL3SA2_PM_D0); in snd_opl3sa2_detect()
264 snd_opl3sa2_write(chip, OPL3SA2_SYS_CTRL, (chip->ymode << 4)); in snd_opl3sa2_detect()
267 snd_opl3sa2_write(chip, OPL3SA2_SYS_CTRL, 0x00); in snd_opl3sa2_detect()
269snd_opl3sa2_write(chip, OPL3SA2_IRQ_CONFIG, 0x0d); /* Interrupt Channel Configuration - IRQ A = OP… in snd_opl3sa2_detect()
271 snd_opl3sa2_write(chip, OPL3SA2_DMA_CONFIG, 0x03); /* DMA Configuration - DMA A = WSS-R + WSS-P */ in snd_opl3sa2_detect()
273snd_opl3sa2_write(chip, OPL3SA2_DMA_CONFIG, 0x21); /* DMA Configuration - DMA B = WSS-R, DMA A = W… in snd_opl3sa2_detect()
275 snd_opl3sa2_write(chip, OPL3SA2_MISC, 0x80 | (tmp & 7)); /* Miscellaneous - default */ in snd_opl3sa2_detect()
277 snd_opl3sa2_write(chip, OPL3SA3_DGTL_DOWN, 0x00); /* Digital Block Partial Power Down - default */ in snd_opl3sa2_detect()
278 snd_opl3sa2_write(chip, OPL3SA3_ANLG_DOWN, 0x00); /* Analog Block Partial Power Down - default */ in snd_opl3sa2_detect()
547 snd_opl3sa2_write(chip, OPL3SA2_PM_CTRL, OPL3SA2_PM_D3); in snd_opl3sa2_suspend()
563 snd_opl3sa2_write(chip, OPL3SA2_PM_CTRL, OPL3SA2_PM_D0); in snd_opl3sa2_resume()
568 snd_opl3sa2_write(chip, i, chip->ctlregs[i]); in snd_opl3sa2_resume()
572 snd_opl3sa2_write(chip, i, chip->ctlregs[i]); in snd_opl3sa2_resume()