include/linux/msi.h

1 /* SPDX-License-Identifier: GPL-2.0 */
33  * platform_msi_desc - Platform device specific msi descriptor data
43  * fsl_mc_msi_desc - FSL-MC device specific msi descriptor data
51  * ti_sci_inta_msi_desc - TISCI based INTA specific msi descriptor data
59  * struct msi_desc - Descriptor structure for MSI based interrupts
71  * @masked:	[PCI MSI/X] Mask bits
72  * @is_msix:	[PCI MSI/X] True if MSI-X
73  * @multiple:	[PCI MSI/X] log2 num of messages allocated
74  * @multi_cap:	[PCI MSI/X] log2 num of messages supported
75  * @maskbit:	[PCI MSI/X] Mask-Pending bit supported?
76  * @is_64:	[PCI MSI/X] Address size: 0=32bit 1=64bit
77  * @entry_nr:	[PCI MSI/X] Entry which is described by this descriptor
78  * @default_irq:[PCI MSI/X] The default pre-assigned non-MSI irq
79  * @mask_pos:	[PCI MSI]   Mask register position
80  * @mask_base:	[PCI MSI-X] Mask register base address
82  * @fsl_mc:	[fsl-mc]    FSL MC device specific msi descriptor data
101 		/* PCI MSI/X specific data */
121 		 * Non PCI variants add their data structure here. New
123 		 * proper name spaces for this. The PCI part is
134 #define msi_desc_to_dev(desc)		((desc)->dev)
135 #define dev_to_msi_list(dev)		(&(dev)->msi_list)
144 		if ((desc)->irq)					\
145 			for (__irq = (desc)->irq;			\
146 			     __irq < ((desc)->irq + (desc)->nvec_used);	\
152 	return desc->iommu_cookie;  in msi_desc_get_iommu_cookie()
158 	desc->iommu_cookie = iommu_cookie;  in msi_desc_set_iommu_cookie()
173 #define first_pci_msi_entry(pdev)	first_msi_entry(&(pdev)->dev)
175 	for_each_msi_entry((desc), &(pdev)->dev)
220 	return -ENODEV;  in arch_setup_msi_irqs()
231  * for fully irq domain based setups. Courtesy to XEN/X86.
262  * struct msi_domain_ops - MSI interrupt domain callbacks
264  * @msi_init:		Domain specific init function for MSI interrupts
265  * @msi_free:		Domain specific function to free a MSI interrupts
266  * @msi_check:		Callback for verification of the domain/info/dev data
267  * @msi_prepare:	Prepare the allocation of the interrupts in the domain
302 	int		(*msi_init)(struct irq_domain *domain,
306 	void		(*msi_free)(struct irq_domain *domain,
309 	int		(*msi_check)(struct irq_domain *domain,
312 	int		(*msi_prepare)(struct irq_domain *domain,
318 	int		(*handle_error)(struct irq_domain *domain,
320 	int		(*domain_alloc_irqs)(struct irq_domain *domain,
322 	void		(*domain_free_irqs)(struct irq_domain *domain,
327  * struct msi_domain_info - MSI interrupt domain data
335  * @data:		Optional: domain specific data
351 	 * Init non implemented ops callbacks with default MSI domain
360 	/* Support multiple PCI MSI interrupts */
362 	/* Support PCI MSIX interrupts */
364 	/* Needs early activate, required for PCI */
371 	/* Is level-triggered capable, using two messages */
381 int __msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev,
383 int msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev,
385 void __msi_domain_free_irqs(struct irq_domain *domain, struct device *dev);
386 void msi_domain_free_irqs(struct irq_domain *domain, struct device *dev);
387 struct msi_domain_info *msi_get_domain_info(struct irq_domain *domain);
396 /* When an MSI domain is used as an intermediate domain */
397 int msi_domain_prepare_irqs(struct irq_domain *domain, struct device *dev,
399 int msi_domain_populate_irqs(struct irq_domain *domain, struct device *dev,
414 int platform_msi_domain_alloc(struct irq_domain *domain, unsigned int virq,
416 void platform_msi_domain_free(struct irq_domain *domain, unsigned int virq,
418 void *platform_msi_get_host_data(struct irq_domain *domain);
426 int pci_msi_domain_check_cap(struct irq_domain *domain,
428 u32 pci_msi_domain_get_msi_rid(struct irq_domain *domain, struct pci_dev *pdev);