Lines Matching refs:HIWORD_UPDATE
18 #define HIWORD_UPDATE(v, h, l) ((((v) << (l)) & GENMASK((h), (l))) | (GENMASK((h), (l)) << 16)) macro
23 #define GPIO0A0_SEL(x) HIWORD_UPDATE(x, 1, 0)
25 #define GPIO0A1_SEL(x) HIWORD_UPDATE(x, 3, 2)
27 #define GPIO0A2_SEL(x) HIWORD_UPDATE(x, 5, 4)
29 #define GPIO0A3_SEL(x) HIWORD_UPDATE(x, 7, 6)
31 #define GPIO0A4_SEL(x) HIWORD_UPDATE(x, 9, 8)
33 #define GPIO0A5_SEL(x) HIWORD_UPDATE(x, 11, 10)
35 #define GPIO0A6_SEL(x) HIWORD_UPDATE(x, 13, 12)
37 #define GPIO0A7_SEL(x) HIWORD_UPDATE(x, 15, 14)
40 #define GPIO0B0_SEL(x) HIWORD_UPDATE(x, 1, 0)
55 #define SW_TVE_DCLK_POL(x) HIWORD_UPDATE(x, 4, 4)
57 #define SW_TVE_DCLK_EN(x) HIWORD_UPDATE(x, 3, 3)
59 #define SW_DCLK_UPSAMPLE_EN(x) HIWORD_UPDATE(x, 2, 2)
61 #define SW_TVE_MODE(x) HIWORD_UPDATE(x, 1, 1)
63 #define SW_TVE_EN(x) HIWORD_UPDATE(x, 0, 0)
68 #define VDAC_ENVBG(x) HIWORD_UPDATE(x, 12, 12)
70 #define VDAC_ENSC0(x) HIWORD_UPDATE(x, 11, 11)
72 #define VDAC_ENEXTREF(x) HIWORD_UPDATE(x, 10, 10)
74 #define VDAC_ENDAC0(x) HIWORD_UPDATE(x, 9, 9)
76 #define VDAC_ENCTR2(x) HIWORD_UPDATE(x, 8, 8)
78 #define VDAC_ENCTR1(x) HIWORD_UPDATE(x, 7, 7)
80 #define VDAC_ENCTR0(x) HIWORD_UPDATE(x, 6, 6)
82 #define VDAC_GAIN(x) HIWORD_UPDATE(x, 5, 0)
93 #define POSTDIV1(x) HIWORD_UPDATE(x, 14, 12)
95 #define FBDIV(x) HIWORD_UPDATE(x, 14, 12)
98 #define PLLPD0(x) HIWORD_UPDATE(x, 13, 13)
101 #define POSTDIV2(x) HIWORD_UPDATE(x, 8, 6)
103 #define REFDIV(x) HIWORD_UPDATE(x, 5, 0)
107 #define CLK_SPLL_MODE(x) HIWORD_UPDATE(x, 2, 0)
111 #define DCLK_CVBS_4X_DIV_CON(x) HIWORD_UPDATE(x, 12, 8)
117 #define DRESETN_CVBS_1X(x) HIWORD_UPDATE(x, 10, 10)
119 #define DRESETN_CVBS_4X(x) HIWORD_UPDATE(x, 9, 9)
121 #define PRESETN_CVBS(x) HIWORD_UPDATE(x, 8, 8)
123 #define PRESETN_GRF(x) HIWORD_UPDATE(x, 3, 3)