Lines Matching +full:5 +full:- +full:bit

1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Defining registers address and its bit definitions of MAX96752F
32 #define CFG_BLOCK BIT(0)
35 #define IIC_2_EN BIT(7)
36 #define IIC_1_EN BIT(6)
37 #define DIS_REM_CC BIT(4)
41 #define VID_TX_EN_U BIT(7)
42 #define VID_TX_EN_Z BIT(6)
43 #define VID_TX_EN_Y BIT(5)
44 #define VID_TX_EN_X BIT(4)
45 #define AUD_TX_EN_Y BIT(3)
46 #define AUD_TX_EN_X BIT(2)
49 #define UART_2_EN BIT(5)
50 #define UART_1_EN BIT(4)
53 #define LOCK_EN BIT(7)
54 #define ERRB_EN BIT(6)
55 #define PU_LF3 BIT(3)
56 #define PU_LF2 BIT(2)
57 #define PU_LF1 BIT(1)
58 #define PU_LF0 BIT(0)
61 #define RCLKEN BIT(5)
64 #define RESET_ALL BIT(7)
65 #define RESET_LINK BIT(6)
66 #define RESET_ONESHOT BIT(5)
67 #define AUTO_LINK BIT(4)
68 #define SLEEP BIT(3)
69 #define REG_ENABLE BIT(2)
73 #define LINK_MODE GENMASK(5, 4)
74 #define LOCKED BIT(3)
81 #define REM_MS_EN BIT(5)
82 #define LOC_MS_EN BIT(4)
85 #define TX_SPLIT_MASK_B BIT(5)
86 #define TX_SPLIT_MASK_A BIT(4)
90 #define AUD_RX_EN BIT(0)
93 #define SPI_EN BIT(0)
99 #define RES_CFG BIT(7)
100 #define TX_PRIO BIT(6)
101 #define TX_COMP_EN BIT(5)
102 #define GPIO_OUT BIT(4)
103 #define GPIO_IN BIT(3)
104 #define GPIO_RX_EN BIT(2)
105 #define GPIO_TX_EN BIT(1)
106 #define GPIO_OUT_DIS BIT(0)
110 #define OUT_TYPE BIT(5)
114 #define OVR_RES_CFG BIT(7)
118 #define START_PORTBU BIT(7)
119 #define START_PORTBZ BIT(6)
120 #define START_PORTBY BIT(5)
121 #define START_PORTBX BIT(4)
122 #define START_PORTAU BIT(3)
123 #define START_PORTAZ BIT(2)
124 #define START_PORTAY BIT(1)
125 #define START_PORTAX BIT(0)
128 #define DV_LOCK BIT(7)
129 #define DV_SWP_AB BIT(6)
130 #define LINE_ALT BIT(5)
131 #define DV_CONV BIT(2)
132 #define DV_SPL BIT(1)
133 #define DV_EN BIT(0)
137 #define MIPI_RX_RESET BIT(3)
153 #define DPI_DE_SKEW_SEL BIT(1)
154 #define DPI_DESKEW_EN BIT(0)
189 #define VS_DET BIT(5)
190 #define HS_DET BIT(4)