linux/gpio/driver.h

1 /* SPDX-License-Identifier: GPL-2.0 */
12 #include <linux/pinctrl/pinconf-generic.h>
30  * struct gpio_irq_chip - GPIO interrupt controller
36 	 * GPIO IRQ chip implementation, provided by GPIO driver.
43 	 * Interrupt translation domain; responsible for mapping between GPIO
67 	 * If non-NULL, will be set as the parent of this GPIO interrupt
68 	 * controller's IRQ domain to establish a hierarchical interrupt
77 	 * This callback translates a child hardware IRQ offset to a parent
78 	 * hardware IRQ offset on a hierarchical interrupt chip. The child
79 	 * hardware IRQs correspond to the GPIO index 0..ngpio-1 (see the
83 	 * a lookup table or whatever method is best for this chip. Return
86 	 * If some ranges of hardware IRQs do not have a corresponding parent
87 	 * HWIRQ, return -EINVAL, but also make sure to fill in @valid_mask and
88 	 * @need_valid_mask to make these GPIO lines unavailable for
102 	 * &gpiochip_populate_parent_fwspec_twocell will be used. A four-cell
113 	 * This optional callback is used to translate the child's GPIO line
114 	 * offset on the GPIO chip to an IRQ number for the GPIO to_irq()
115 	 * callback. If this is not specified, then a default callback will be
124 	 * The IRQ domain operations that will be used for this GPIO IRQ
135 	 * The IRQ handler to use (often a predefined IRQ core function) for
136 	 * GPIO IRQs, provided by GPIO driver.
143 	 * Default IRQ triggering type applied during GPIO driver
144 	 * initialization, provided by GPIO driver.
151 	 * Per GPIO IRQ chip lockdep class for IRQ lock.
158 	 * Per GPIO IRQ chip lockdep class for IRQ request.
165 	 * The interrupt handler for the GPIO chip's parent interrupts, may be
181 	 * The number of interrupt parents of a GPIO chip.
188 	 * A list of interrupt parents of a GPIO chip. This is owned by the
196 	 * A list of interrupt parents for each line of a GPIO chip.
210 	 * a particular driver wants to clear IRQ related registers
217 	 * used if not all GPIO lines are valid interrupts. Sometimes some
219 	 * is passed a bitmap in "valid_mask" and it will have ngpios
220 	 * bits from 0..(ngpios-1) set to "1" as in valid. The callback can
274 	 * Flag to track GPIO chip irq member's initialization.
275 	 * This flag will make sure GPIO chip irq members are not used
283  * struct gpio_chip - abstract a GPIO controller
284  * @label: a functional name for the GPIO device, such as a part
285  *	number or the name of the SoC IP-block implementing it.
289  * @request: optional hook for chip-specific activation, such as
291  * @free: optional hook for chip-specific deactivation, such as
296  *	function, even on input-only or output-only gpio chips.
298  *	This can be omitted on input-only or output-only gpio chips.
300  *	This can be omitted on input-only or output-only gpio chips.
308  * @to_irq: optional hook supporting non-static gpio_to_irq() mappings;
316  *	requires special mapping of the pins that provides GPIO functionality.
317  *	It is called after adding GPIO chip and before adding IRQ chip.
318  * @base: identifies the first GPIO number handled by this chip;
320  *	DEPRECATION: providing anything non-negative and nailing the base
321  *	offset of GPIO chips is deprecated. Please pass -1 as base to
323  *	get rid of the static GPIO number space in the long run.
324  * @ngpio: the number of GPIOs handled by this controller; the last GPIO
325  *	handled is (base + ngpio - 1).
328  *      may be NULL if there is no alias for the GPIO, however the
329  *      array must be @ngpio entries long.  A name can include a single printk
331  *      number of the gpio.
333  *	must while accessing GPIO expander chips over I2C or SPI. This
337  * @read_reg: reader function for generic GPIO
338  * @write_reg: writer function for generic GPIO
339  * @be_bits: if the generic GPIO has big endian bit order (bit 31 is representing
341  *	generic GPIO core. It is for internal housekeeping only.
342  * @reg_dat: data (in) register for generic GPIO
343  * @reg_set: output set register (out=high) for generic GPIO
344  * @reg_clr: output clear register (out=low) for generic GPIO
345  * @reg_dir_out: direction out setting register for generic GPIO
346  * @reg_dir_in: direction in setting register for generic GPIO
349  * @bgpio_bits: number of register bits used for a generic GPIO i.e.
351  * @bgpio_lock: used to lock chip->bgpio_data. Also, this is needed to keep
353  * @bgpio_data:	shadowed data register for generic GPIO to clear/set bits
355  * @bgpio_dir: shadowed direction register for generic GPIO to clear/set
356  *	direction safely. A "1" in this word means the line is set as
359  * A gpio_chip can help platforms abstract various sources of GPIOs so
360  * they can all be accessed through a common programing interface.
362  * chips, dedicated GPIO expanders, and so on.
364  * Each chip controls a number of signals, identified in method calls
365  * by "offset" values in the range 0..(@ngpio - 1).  When those signals
366  * are referenced through calls like gpio_get_value(gpio), the offset
367  * is calculated by subtracting @base from the gpio number.
440 	 * Integrates interrupt chip functionality with the GPIO chip. Can be
456 	 * If CONFIG_OF is enabled, then all GPIO controllers described in the
463 	 * Pointer to a device tree node representing this GPIO controller.
470 	 * Number of cells used to form the GPIO specifier.
477 	 * Callback to translate a device tree GPIO specifier into a chip-
478 	 * relative GPIO number and flags.
492  * for_each_requested_gpio_in_range - iterates over requested GPIOs in a given range
495  * @base:	first GPIO in the range
497  * @label:	label of current GPIO
503 /* Iterates over all requested GPIO of the given @chip */
505 	for_each_requested_gpio_in_range(chip, i, 0, chip->ngpio, label)
513  * gpiochip_add_data() - register a gpio_chip
514  * @gc: the chip to register, with gc->base initialized
515  * @data: driver-private data associated with this chip
520  * can be freely used, the gc->parent device must be registered before
521  * the gpio framework's arch_initcall().  Otherwise sysfs initialization
527  * If gc->base is negative, this requests dynamic assignment of
528  * a range of valid GPIOs.
531  * A negative errno if the chip can't be registered, such as because the
532  * gc->base is invalid or already associated with a different chip.
533  * Otherwise it returns zero as a success code.
662 	return -EINVAL;  in gpiochip_irqchip_add_domain()
669  * Lockdep requires that each irqchip instance be created with a
671  * boilerplate static inlines provides such a key for each
730  * struct gpio_pin_range - pin range controlled by a gpio chip
733  * @range: actual range of pins controlled by a gpio controller
795 	/* GPIO can never have been requested */  in gpiod_to_chip()
797 	return ERR_PTR(-ENODEV);  in gpiod_to_chip()
804 	return -EINVAL;  in gpiochip_lock_as_irq()