Lines Matching +full:watchdog +full:- +full:timer
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * sp5100_tco : TCO timer driver for sp5100 chipsets
13 * AMD Publication 45482 "AMD SB800-Series Southbridges Register
16 * for AMD Family 16h Models 00h-0Fh Processors"
19 * for AMD Family 16h Models 30h-3Fh Processors"
20 * AMD Publication 55570-B1-PUB "Processor Programming Reference (PPR)
23 * AMD Publication 55772-A1-PUB "Processor Programming Reference (PPR)
42 #include <linux/watchdog.h>
46 #define TCO_DRIVER_NAME "sp5100-tco"
60 /* the watchdog platform device */
70 MODULE_PARM_DESC(heartbeat, "Watchdog heartbeat in seconds. (default="
75 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started."
84 if (dev->vendor == PCI_VENDOR_ID_ATI && in tco_reg_layout()
85 dev->device == PCI_DEVICE_ID_ATI_SBX00_SMBUS && in tco_reg_layout()
86 dev->revision < 0x40) { in tco_reg_layout()
88 } else if (dev->vendor == PCI_VENDOR_ID_AMD && in tco_reg_layout()
89 ((dev->device == PCI_DEVICE_ID_AMD_HUDSON2_SMBUS && in tco_reg_layout()
90 dev->revision >= 0x41) || in tco_reg_layout()
91 (dev->device == PCI_DEVICE_ID_AMD_KERNCZ_SMBUS && in tco_reg_layout()
92 dev->revision >= 0x49))) { in tco_reg_layout()
103 val = readl(SP5100_WDT_CONTROL(tco->tcobase)); in tco_timer_start()
105 writel(val, SP5100_WDT_CONTROL(tco->tcobase)); in tco_timer_start()
115 val = readl(SP5100_WDT_CONTROL(tco->tcobase)); in tco_timer_stop()
117 writel(val, SP5100_WDT_CONTROL(tco->tcobase)); in tco_timer_stop()
127 val = readl(SP5100_WDT_CONTROL(tco->tcobase)); in tco_timer_ping()
129 writel(val, SP5100_WDT_CONTROL(tco->tcobase)); in tco_timer_ping()
139 /* Write new heartbeat to watchdog */ in tco_timer_set_timeout()
140 writel(t, SP5100_WDT_COUNT(tco->tcobase)); in tco_timer_set_timeout()
142 wdd->timeout = t; in tco_timer_set_timeout()
168 switch (tco->tco_reg_layout) { in tco_timer_enable()
171 /* Set the Watchdog timer resolution to 1 sec */ in tco_timer_enable()
175 /* Enable watchdog decode bit and watchdog timer */ in tco_timer_enable()
182 /* Enable watchdog decode bit */ in tco_timer_enable()
193 /* Enable Watchdog timer and set the resolution to 1 sec */ in tco_timer_enable()
199 /* Set the Watchdog timer resolution to 1 sec and enable */ in tco_timer_enable()
212 for (i = 3; i >= 0; i--) in sp5100_tco_read_pm_reg32()
231 return -EBUSY; in sp5100_tco_setupdevice()
237 switch (tco->tco_reg_layout) { in sp5100_tco_setupdevice()
253 * region, it also enables the watchdog itself. in sp5100_tco_setupdevice()
267 return -ENODEV; in sp5100_tco_setupdevice()
277 switch (tco->tco_reg_layout) { in sp5100_tco_setupdevice()
280 * Secondly, Find the watchdog timer MMIO address in sp5100_tco_setupdevice()
290 ret = -ENODEV; in sp5100_tco_setupdevice()
303 ret = -ENODEV; in sp5100_tco_setupdevice()
312 ret = -ENODEV; in sp5100_tco_setupdevice()
326 ret = -EBUSY; in sp5100_tco_setupdevice()
331 tco->tcobase = devm_ioremap(dev, mmio_addr, SP5100_WDT_MEM_MAP_SIZE); in sp5100_tco_setupdevice()
332 if (!tco->tcobase) { in sp5100_tco_setupdevice()
334 ret = -ENOMEM; in sp5100_tco_setupdevice()
338 dev_info(dev, "Using 0x%08x for watchdog MMIO address\n", mmio_addr); in sp5100_tco_setupdevice()
340 /* Setup the watchdog timer */ in sp5100_tco_setupdevice()
343 val = readl(SP5100_WDT_CONTROL(tco->tcobase)); in sp5100_tco_setupdevice()
345 dev_err(dev, "Watchdog hardware is disabled\n"); in sp5100_tco_setupdevice()
346 ret = -ENODEV; in sp5100_tco_setupdevice()
355 wdd->bootstatus = WDIOF_CARDRESET; in sp5100_tco_setupdevice()
356 /* Set watchdog action to reset the system */ in sp5100_tco_setupdevice()
358 writel(val, SP5100_WDT_CONTROL(tco->tcobase)); in sp5100_tco_setupdevice()
360 /* Set a reasonable heartbeat before we stop the timer */ in sp5100_tco_setupdevice()
361 tco_timer_set_timeout(wdd, wdd->timeout); in sp5100_tco_setupdevice()
365 * a zeroed timer. in sp5100_tco_setupdevice()
379 .identity = "SP5100 TCO timer",
393 struct device *dev = &pdev->dev; in sp5100_tco_probe()
400 return -ENOMEM; in sp5100_tco_probe()
402 tco->tco_reg_layout = tco_reg_layout(sp5100_tco_pci); in sp5100_tco_probe()
404 wdd = &tco->wdd; in sp5100_tco_probe()
405 wdd->parent = dev; in sp5100_tco_probe()
406 wdd->info = &sp5100_tco_wdt_info; in sp5100_tco_probe()
407 wdd->ops = &sp5100_tco_wdt_ops; in sp5100_tco_probe()
408 wdd->timeout = WATCHDOG_HEARTBEAT; in sp5100_tco_probe()
409 wdd->min_timeout = 1; in sp5100_tco_probe()
410 wdd->max_timeout = 0xffff; in sp5100_tco_probe()
428 wdd->timeout, nowayout); in sp5100_tco_probe()
473 return -ENODEV; in sp5100_tco_init()
475 pr_info("SP5100/SB800 TCO WatchDog Timer Driver\n"); in sp5100_tco_init()
482 platform_device_register_simple(TCO_DRIVER_NAME, -1, NULL, 0); in sp5100_tco_init()
505 MODULE_DESCRIPTION("TCO timer driver for SP5100/SB800 chipset");