160 static void octeon_wdt_write_string(const char *str)  in octeon_wdt_write_string()  function
224 	octeon_wdt_write_string("\r\n*** NMI Watchdog interrupt on Core 0x");  in octeon_wdt_nmi_stage3()
226 	octeon_wdt_write_string(" ***\r\n");  in octeon_wdt_nmi_stage3()
228 		octeon_wdt_write_string("\t");  in octeon_wdt_nmi_stage3()
229 		octeon_wdt_write_string(reg_name[i]);  in octeon_wdt_nmi_stage3()
230 		octeon_wdt_write_string("\t0x");  in octeon_wdt_nmi_stage3()
233 			octeon_wdt_write_string("\r\n");  in octeon_wdt_nmi_stage3()
235 	octeon_wdt_write_string("\terr_epc\t0x");  in octeon_wdt_nmi_stage3()
238 	octeon_wdt_write_string("\tepc\t0x");  in octeon_wdt_nmi_stage3()
240 	octeon_wdt_write_string("\r\n");  in octeon_wdt_nmi_stage3()
242 	octeon_wdt_write_string("\tstatus\t0x");  in octeon_wdt_nmi_stage3()
244 	octeon_wdt_write_string("\tcause\t0x");  in octeon_wdt_nmi_stage3()
246 	octeon_wdt_write_string("\r\n");  in octeon_wdt_nmi_stage3()
250 		octeon_wdt_write_string("\tsrc_wd\t0x");  in octeon_wdt_nmi_stage3()
252 		octeon_wdt_write_string("\ten_wd\t0x");  in octeon_wdt_nmi_stage3()
254 		octeon_wdt_write_string("\r\n");  in octeon_wdt_nmi_stage3()
255 		octeon_wdt_write_string("\tsrc_rml\t0x");  in octeon_wdt_nmi_stage3()
257 		octeon_wdt_write_string("\ten_rml\t0x");  in octeon_wdt_nmi_stage3()
259 		octeon_wdt_write_string("\r\n");  in octeon_wdt_nmi_stage3()
260 		octeon_wdt_write_string("\tsum\t0x");  in octeon_wdt_nmi_stage3()
262 		octeon_wdt_write_string("\r\n");  in octeon_wdt_nmi_stage3()
264 		octeon_wdt_write_string("\tsum0\t0x");  in octeon_wdt_nmi_stage3()
266 		octeon_wdt_write_string("\ten0\t0x");  in octeon_wdt_nmi_stage3()
268 		octeon_wdt_write_string("\r\n");  in octeon_wdt_nmi_stage3()
271 	octeon_wdt_write_string("*** Chip soft reset soon ***\r\n");  in octeon_wdt_nmi_stage3()