Lines Matching refs:dec

486 static int av1dec_set_l2_cache(struct av1dec_dev *dec, struct av1dec_task *task)  in av1dec_set_l2_cache()  argument
510 dec->reg_base[AV1DEC_CLASS_CACHE] + AV1_L2_CACHE_PP0_Y_CONFIG0); in av1dec_set_l2_cache()
512 writel_relaxed(val, dec->reg_base[AV1DEC_CLASS_CACHE] + AV1_L2_CACHE_PP0_Y_CONFIG2); in av1dec_set_l2_cache()
515 writel_relaxed(val, dec->reg_base[AV1DEC_CLASS_CACHE] + AV1_L2_CACHE_PP0_Y_CONFIG3); in av1dec_set_l2_cache()
524 dec->reg_base[AV1DEC_CLASS_CACHE] + AV1_L2_CACHE_PP0_U_CONFIG0); in av1dec_set_l2_cache()
526 writel_relaxed(val, dec->reg_base[AV1DEC_CLASS_CACHE] + AV1_L2_CACHE_PP0_U_CONFIG2); in av1dec_set_l2_cache()
529 writel_relaxed(val, dec->reg_base[AV1DEC_CLASS_CACHE] + AV1_L2_CACHE_PP0_U_CONFIG3); in av1dec_set_l2_cache()
531 writel_relaxed(0xf, dec->reg_base[AV1DEC_CLASS_CACHE] + AV1_L2_CACHE_INT_MASK); in av1dec_set_l2_cache()
535 dec->reg_base[AV1DEC_CLASS_CACHE] + AV1_L2_CACHE_SHAPER_CTRL); in av1dec_set_l2_cache()
540 writel_relaxed(0x00000001, dec->reg_base[AV1DEC_CLASS_CACHE] + in av1dec_set_l2_cache()
543 writel_relaxed(0x00000081, dec->reg_base[AV1DEC_CLASS_CACHE] + in av1dec_set_l2_cache()
562 static int av1dec_set_afbc(struct av1dec_dev *dec, struct av1dec_task *task) in av1dec_set_afbc() argument
614 dec->reg_base[AV1DEC_CLASS_AFBC] + REG_CONTROL); in av1dec_set_afbc()
615 writel_relaxed(0x1, dec->reg_base[AV1DEC_CLASS_AFBC] + REG_INTRENBL); in av1dec_set_afbc()
619 dec->reg_base[AV1DEC_CLASS_AFBC] + REG_FORMAT + i * 4); in av1dec_set_afbc()
620 writel_relaxed(fbc_comp_en[i], dec->reg_base[AV1DEC_CLASS_AFBC] + in av1dec_set_afbc()
624 dec->reg_base[AV1DEC_CLASS_AFBC] + REG_HEADERBASE + i * 4); in av1dec_set_afbc()
627 dec->reg_base[AV1DEC_CLASS_AFBC] + REG_PAYLOADBASE + i * 4); in av1dec_set_afbc()
630 dec->reg_base[AV1DEC_CLASS_AFBC] + REG_INPUTBUFSIZE + i * 4); in av1dec_set_afbc()
633 dec->reg_base[AV1DEC_CLASS_AFBC] + REG_INPUTBUFBASE + i * 4); in av1dec_set_afbc()
635 writel_relaxed(pp_input_stride[i], dec->reg_base[AV1DEC_CLASS_AFBC] + in av1dec_set_afbc()
641 dec->reg_base[AV1DEC_CLASS_AFBC] + REG_CONTROL); /* update */ in av1dec_set_afbc()
642 writel((fbc_stream_number << 9), dec->reg_base[AV1DEC_CLASS_AFBC] + REG_CONTROL); in av1dec_set_afbc()
652 struct av1dec_dev *dec = to_av1dec_dev(mpp); in av1dec_run() local
653 struct av1dec_hw_info *hw = dec->hw_info; in av1dec_run()
659 av1dec_set_l2_cache(dec, task); in av1dec_run()
660 av1dec_set_afbc(dec, task); in av1dec_run()
684 writel_relaxed(regs[j], dec->reg_base[class] + j * sizeof(u32)); in av1dec_run()
707 struct av1dec_dev *dec = to_av1dec_dev(mpp); in av1dec_vcd_irq() local
708 struct av1dec_hw_info *hw = dec->hw_info; in av1dec_vcd_irq()
726 struct av1dec_dev *dec = to_av1dec_dev(mpp); in av1dec_isr() local
742 writel_relaxed(0x0, dec->reg_base[AV1DEC_CLASS_CACHE] + 0x020); in av1dec_isr()
743 writel_relaxed(0x0, dec->reg_base[AV1DEC_CLASS_CACHE] + 0x204); in av1dec_isr()
745 writel_relaxed(0x00000000, dec->reg_base[AV1DEC_CLASS_CACHE] + 0x208); in av1dec_isr()
748 u32 ack_status = readl(dec->reg_base[AV1DEC_CLASS_AFBC] + REG_ACKNOWLEDGE); in av1dec_isr()
751 u32 ctl_val = readl(dec->reg_base[AV1DEC_CLASS_AFBC] + REG_CONTROL); in av1dec_isr()
754 writel_relaxed(ctl_val, dec->reg_base[AV1DEC_CLASS_AFBC] + REG_CONTROL); in av1dec_isr()
759 if (task->irq_status & dec->hw_info->err_mask) { in av1dec_isr()
780 struct av1dec_dev *dec = to_av1dec_dev(mpp); in av1dec_finish() local
781 struct av1dec_hw_info *hw = dec->hw_info; in av1dec_finish()
808 regs[j] = readl_relaxed(dec->reg_base[class] + j * sizeof(u32)); in av1dec_finish()
824 struct av1dec_dev *dec = to_av1dec_dev(mpp); in av1dec_result() local
825 struct av1dec_hw_info *hw = dec->hw_info; in av1dec_result()
868 struct av1dec_dev *dec = to_av1dec_dev(mpp); in av1dec_procfs_remove() local
870 if (dec->procfs) { in av1dec_procfs_remove()
871 proc_remove(dec->procfs); in av1dec_procfs_remove()
872 dec->procfs = NULL; in av1dec_procfs_remove()
880 struct av1dec_dev *dec = to_av1dec_dev(mpp); in av1dec_procfs_init() local
882 dec->procfs = proc_mkdir(mpp->dev->of_node->name, mpp->srv->procfs); in av1dec_procfs_init()
883 if (IS_ERR_OR_NULL(dec->procfs)) { in av1dec_procfs_init()
885 dec->procfs = NULL; in av1dec_procfs_init()
890 mpp_procfs_create_common(dec->procfs, mpp); in av1dec_procfs_init()
894 dec->procfs, &dec->aclk_info.debug_rate_hz); in av1dec_procfs_init()
896 dec->procfs, &mpp->session_max_buffers); in av1dec_procfs_init()
914 struct av1dec_dev *dec = to_av1dec_dev(mpp); in av1dec_init() local
918 ret = mpp_get_clk_info(mpp, &dec->aclk_info, "aclk_vcodec"); in av1dec_init()
921 ret = mpp_get_clk_info(mpp, &dec->hclk_info, "hclk_vcodec"); in av1dec_init()
928 &dec->default_max_load); in av1dec_init()
930 mpp_set_clk_info_rate_hz(&dec->aclk_info, CLK_MODE_DEFAULT, 300 * MHZ); in av1dec_init()
933 dec->rst_a = mpp_reset_control_get(mpp, RST_TYPE_A, "video_a"); in av1dec_init()
934 if (!dec->rst_a) in av1dec_init()
936 dec->rst_h = mpp_reset_control_get(mpp, RST_TYPE_H, "video_h"); in av1dec_init()
937 if (!dec->rst_h) in av1dec_init()
945 struct av1dec_dev *dec = to_av1dec_dev(mpp); in av1dec_reset() local
949 if (dec->rst_a && dec->rst_h) { in av1dec_reset()
951 mpp_safe_reset(dec->rst_a); in av1dec_reset()
952 mpp_safe_reset(dec->rst_h); in av1dec_reset()
954 mpp_safe_unreset(dec->rst_a); in av1dec_reset()
955 mpp_safe_unreset(dec->rst_h); in av1dec_reset()
966 struct av1dec_dev *dec = to_av1dec_dev(mpp); in av1dec_clk_on() local
968 mpp_clk_safe_enable(dec->aclk_info.clk); in av1dec_clk_on()
969 mpp_clk_safe_enable(dec->hclk_info.clk); in av1dec_clk_on()
976 struct av1dec_dev *dec = to_av1dec_dev(mpp); in av1dec_clk_off() local
978 clk_disable_unprepare(dec->aclk_info.clk); in av1dec_clk_off()
979 clk_disable_unprepare(dec->hclk_info.clk); in av1dec_clk_off()
987 struct av1dec_dev *dec = to_av1dec_dev(mpp); in av1dec_set_freq() local
990 mpp_clk_set_rate(&dec->aclk_info, task->clk_mode); in av1dec_set_freq()
1202 static int av1dec_cache_init(struct platform_device *pdev, struct av1dec_dev *dec) in av1dec_cache_init() argument
1211 dec->reg_base[AV1DEC_CLASS_CACHE] = devm_ioremap(dev, res->start, resource_size(res)); in av1dec_cache_init()
1212 if (!dec->reg_base[AV1DEC_CLASS_CACHE]) { in av1dec_cache_init()
1219 static int av1dec_afbc_init(struct platform_device *pdev, struct av1dec_dev *dec) in av1dec_afbc_init() argument
1228 dec->reg_base[AV1DEC_CLASS_AFBC] = devm_ioremap(dev, res->start, resource_size(res)); in av1dec_afbc_init()
1229 if (!dec->reg_base[AV1DEC_CLASS_AFBC]) { in av1dec_afbc_init()
1233 dec->irq[AV1DEC_CLASS_AFBC] = platform_get_irq(pdev, 2); in av1dec_afbc_init()
1242 struct av1dec_dev *dec = NULL; in av1dec_probe() local
1248 dec = devm_kzalloc(dev, sizeof(*dec), GFP_KERNEL); in av1dec_probe()
1249 if (!dec) in av1dec_probe()
1252 mpp = &dec->mpp; in av1dec_probe()
1253 platform_set_drvdata(pdev, dec); in av1dec_probe()
1269 dec->reg_base[AV1DEC_CLASS_VCD] = mpp->reg_base; in av1dec_probe()
1279 dec->irq[AV1DEC_CLASS_VCD] = mpp->irq; in av1dec_probe()
1281 ret = av1dec_cache_init(pdev, dec); in av1dec_probe()
1285 ret = av1dec_afbc_init(pdev, dec); in av1dec_probe()
1289 dec->hw_info = to_av1dec_info(mpp->var->hw_info); in av1dec_probe()
1305 struct av1dec_dev *dec = platform_get_drvdata(pdev); in av1dec_remove() local
1308 mpp_dev_remove(&dec->mpp); in av1dec_remove()
1309 av1dec_procfs_remove(&dec->mpp); in av1dec_remove()
1319 struct av1dec_dev *dec = platform_get_drvdata(pdev); in av1dec_shutdown() local
1320 struct mpp_dev *mpp = &dec->mpp; in av1dec_shutdown()