356 	struct io_register reg[IGA2_SHADOW_HOR_TOTAL_REG_NUM];  member
362 	struct io_register reg[IGA2_SHADOW_HOR_BLANK_END_REG_NUM];  member
368 	struct io_register reg[IGA2_SHADOW_VER_TOTAL_REG_NUM];  member
374 	struct io_register reg[IGA2_SHADOW_VER_ADDR_REG_NUM];  member
380 	struct io_register reg[IGA2_SHADOW_VER_BLANK_START_REG_NUM];  member
386 	struct io_register reg[IGA2_SHADOW_VER_BLANK_END_REG_NUM];  member
392 	struct io_register reg[IGA2_SHADOW_VER_SYNC_START_REG_NUM];  member
398 	struct io_register reg[IGA2_SHADOW_VER_SYNC_END_REG_NUM];  member
404 	struct io_register reg[IGA1_FETCH_COUNT_REG_NUM];  member
410 	struct io_register reg[IGA2_FETCH_COUNT_REG_NUM];  member
421 	struct io_register reg[IGA1_STARTING_ADDR_REG_NUM];  member
426 	struct io_register reg[IGA2_STARTING_ADDR_REG_NUM];  member
437 	struct io_register reg[LCD_POWER_SEQ_TD0_REG_NUM];  member
442 	struct io_register reg[LCD_POWER_SEQ_TD1_REG_NUM];  member
447 	struct io_register reg[LCD_POWER_SEQ_TD2_REG_NUM];  member
452 	struct io_register reg[LCD_POWER_SEQ_TD3_REG_NUM];  member
465 	struct io_register reg[LCD_HOR_SCALING_FACTOR_REG_NUM];  member
470 	struct io_register reg[LCD_VER_SCALING_FACTOR_REG_NUM];  member
501 	struct io_register reg[IGA1_FIFO_DEPTH_SELECT_REG_NUM];  member
506 	struct io_register reg[IGA1_FIFO_THRESHOLD_REG_NUM];  member
511 	struct io_register reg[IGA1_FIFO_HIGH_THRESHOLD_REG_NUM];  member
516 	struct io_register reg[IGA1_DISPLAY_QUEUE_EXPIRE_NUM_REG_NUM];  member
521 	struct io_register reg[IGA2_FIFO_DEPTH_SELECT_REG_NUM];  member
526 	struct io_register reg[IGA2_FIFO_THRESHOLD_REG_NUM];  member
531 	struct io_register reg[IGA2_FIFO_HIGH_THRESHOLD_REG_NUM];  member
536 	struct io_register reg[IGA2_DISPLAY_QUEUE_EXPIRE_NUM_REG_NUM];  member