Lines Matching refs:status
34 #define check_warn(status, fmt, args...) \ argument
35 ({ if (status < 0) pr_warn(fmt, ##args); })
37 #define check_warn_return(status, fmt, args...) \ argument
38 ({ if (status < 0) { pr_warn(fmt, ##args); return status; } })
40 #define check_warn_goto_error(status, fmt, args...) \ argument
41 ({ if (status < 0) { pr_warn(fmt, ##args); goto error; } })
199 int status = ufx_reg_read(dev, index, &data); in ufx_reg_clear_and_set_bits() local
200 check_warn_return(status, "ufx_reg_clear_and_set_bits error reading " in ufx_reg_clear_and_set_bits()
206 status = ufx_reg_write(dev, index, data); in ufx_reg_clear_and_set_bits()
207 check_warn_return(status, "ufx_reg_clear_and_set_bits error writing " in ufx_reg_clear_and_set_bits()
225 int status; in ufx_lite_reset() local
228 status = ufx_reg_write(dev, 0x3008, 0x00000001); in ufx_lite_reset()
229 check_warn_return(status, "ufx_lite_reset error writing 0x3008"); in ufx_lite_reset()
231 status = ufx_reg_read(dev, 0x3008, &value); in ufx_lite_reset()
232 check_warn_return(status, "ufx_lite_reset error reading 0x3008"); in ufx_lite_reset()
243 int status = ufx_reg_read(dev, 0x2004, &dc_sts); in ufx_blank() local
244 check_warn_return(status, "ufx_blank error reading 0x2004"); in ufx_blank()
246 status = ufx_reg_read(dev, 0x2000, &dc_ctrl); in ufx_blank()
247 check_warn_return(status, "ufx_blank error reading 0x2000"); in ufx_blank()
255 status = ufx_reg_write(dev, 0x2000, dc_ctrl); in ufx_blank()
256 check_warn_return(status, "ufx_blank error writing 0x2000"); in ufx_blank()
263 status = ufx_reg_read(dev, 0x2004, &dc_sts); in ufx_blank()
264 check_warn_return(status, "ufx_blank error reading 0x2004"); in ufx_blank()
280 int status = ufx_reg_read(dev, 0x2004, &dc_sts); in ufx_unblank() local
281 check_warn_return(status, "ufx_unblank error reading 0x2004"); in ufx_unblank()
283 status = ufx_reg_read(dev, 0x2000, &dc_ctrl); in ufx_unblank()
284 check_warn_return(status, "ufx_unblank error reading 0x2000"); in ufx_unblank()
292 status = ufx_reg_write(dev, 0x2000, dc_ctrl); in ufx_unblank()
293 check_warn_return(status, "ufx_unblank error writing 0x2000"); in ufx_unblank()
300 status = ufx_reg_read(dev, 0x2004, &dc_sts); in ufx_unblank()
301 check_warn_return(status, "ufx_unblank error reading 0x2004"); in ufx_unblank()
317 int status = ufx_reg_read(dev, 0x2004, &dc_sts); in ufx_disable() local
318 check_warn_return(status, "ufx_disable error reading 0x2004"); in ufx_disable()
320 status = ufx_reg_read(dev, 0x2000, &dc_ctrl); in ufx_disable()
321 check_warn_return(status, "ufx_disable error reading 0x2000"); in ufx_disable()
329 status = ufx_reg_write(dev, 0x2000, dc_ctrl); in ufx_disable()
330 check_warn_return(status, "ufx_disable error writing 0x2000"); in ufx_disable()
337 status = ufx_reg_read(dev, 0x2004, &dc_sts); in ufx_disable()
338 check_warn_return(status, "ufx_disable error reading 0x2004"); in ufx_disable()
354 int status = ufx_reg_read(dev, 0x2004, &dc_sts); in ufx_enable() local
355 check_warn_return(status, "ufx_enable error reading 0x2004"); in ufx_enable()
357 status = ufx_reg_read(dev, 0x2000, &dc_ctrl); in ufx_enable()
358 check_warn_return(status, "ufx_enable error reading 0x2000"); in ufx_enable()
366 status = ufx_reg_write(dev, 0x2000, dc_ctrl); in ufx_enable()
367 check_warn_return(status, "ufx_enable error writing 0x2000"); in ufx_enable()
374 status = ufx_reg_read(dev, 0x2004, &dc_sts); in ufx_enable()
375 check_warn_return(status, "ufx_enable error reading 0x2004"); in ufx_enable()
387 int status = ufx_reg_write(dev, 0x700C, 0x8000000F); in ufx_config_sys_clk() local
388 check_warn_return(status, "error writing 0x700C"); in ufx_config_sys_clk()
390 status = ufx_reg_write(dev, 0x7014, 0x0010024F); in ufx_config_sys_clk()
391 check_warn_return(status, "error writing 0x7014"); in ufx_config_sys_clk()
393 status = ufx_reg_write(dev, 0x7010, 0x00000000); in ufx_config_sys_clk()
394 check_warn_return(status, "error writing 0x7010"); in ufx_config_sys_clk()
396 status = ufx_reg_clear_bits(dev, 0x700C, 0x0000000A); in ufx_config_sys_clk()
397 check_warn_return(status, "error clearing PLL1 bypass in 0x700C"); in ufx_config_sys_clk()
400 status = ufx_reg_clear_bits(dev, 0x700C, 0x80000000); in ufx_config_sys_clk()
401 check_warn_return(status, "error clearing output gate in 0x700C"); in ufx_config_sys_clk()
408 int status, i = 0; in ufx_config_ddr2() local
411 status = ufx_reg_write(dev, 0x0004, 0x001F0F77); in ufx_config_ddr2()
412 check_warn_return(status, "error writing 0x0004"); in ufx_config_ddr2()
414 status = ufx_reg_write(dev, 0x0008, 0xFFF00000); in ufx_config_ddr2()
415 check_warn_return(status, "error writing 0x0008"); in ufx_config_ddr2()
417 status = ufx_reg_write(dev, 0x000C, 0x0FFF2222); in ufx_config_ddr2()
418 check_warn_return(status, "error writing 0x000C"); in ufx_config_ddr2()
420 status = ufx_reg_write(dev, 0x0010, 0x00030814); in ufx_config_ddr2()
421 check_warn_return(status, "error writing 0x0010"); in ufx_config_ddr2()
423 status = ufx_reg_write(dev, 0x0014, 0x00500019); in ufx_config_ddr2()
424 check_warn_return(status, "error writing 0x0014"); in ufx_config_ddr2()
426 status = ufx_reg_write(dev, 0x0018, 0x020D0F15); in ufx_config_ddr2()
427 check_warn_return(status, "error writing 0x0018"); in ufx_config_ddr2()
429 status = ufx_reg_write(dev, 0x001C, 0x02532305); in ufx_config_ddr2()
430 check_warn_return(status, "error writing 0x001C"); in ufx_config_ddr2()
432 status = ufx_reg_write(dev, 0x0020, 0x0B030905); in ufx_config_ddr2()
433 check_warn_return(status, "error writing 0x0020"); in ufx_config_ddr2()
435 status = ufx_reg_write(dev, 0x0024, 0x00000827); in ufx_config_ddr2()
436 check_warn_return(status, "error writing 0x0024"); in ufx_config_ddr2()
438 status = ufx_reg_write(dev, 0x0028, 0x00000000); in ufx_config_ddr2()
439 check_warn_return(status, "error writing 0x0028"); in ufx_config_ddr2()
441 status = ufx_reg_write(dev, 0x002C, 0x00000042); in ufx_config_ddr2()
442 check_warn_return(status, "error writing 0x002C"); in ufx_config_ddr2()
444 status = ufx_reg_write(dev, 0x0030, 0x09520000); in ufx_config_ddr2()
445 check_warn_return(status, "error writing 0x0030"); in ufx_config_ddr2()
447 status = ufx_reg_write(dev, 0x0034, 0x02223314); in ufx_config_ddr2()
448 check_warn_return(status, "error writing 0x0034"); in ufx_config_ddr2()
450 status = ufx_reg_write(dev, 0x0038, 0x00430043); in ufx_config_ddr2()
451 check_warn_return(status, "error writing 0x0038"); in ufx_config_ddr2()
453 status = ufx_reg_write(dev, 0x003C, 0xF00F000F); in ufx_config_ddr2()
454 check_warn_return(status, "error writing 0x003C"); in ufx_config_ddr2()
456 status = ufx_reg_write(dev, 0x0040, 0xF380F00F); in ufx_config_ddr2()
457 check_warn_return(status, "error writing 0x0040"); in ufx_config_ddr2()
459 status = ufx_reg_write(dev, 0x0044, 0xF00F0496); in ufx_config_ddr2()
460 check_warn_return(status, "error writing 0x0044"); in ufx_config_ddr2()
462 status = ufx_reg_write(dev, 0x0048, 0x03080406); in ufx_config_ddr2()
463 check_warn_return(status, "error writing 0x0048"); in ufx_config_ddr2()
465 status = ufx_reg_write(dev, 0x004C, 0x00001000); in ufx_config_ddr2()
466 check_warn_return(status, "error writing 0x004C"); in ufx_config_ddr2()
468 status = ufx_reg_write(dev, 0x005C, 0x00000007); in ufx_config_ddr2()
469 check_warn_return(status, "error writing 0x005C"); in ufx_config_ddr2()
471 status = ufx_reg_write(dev, 0x0100, 0x54F00012); in ufx_config_ddr2()
472 check_warn_return(status, "error writing 0x0100"); in ufx_config_ddr2()
474 status = ufx_reg_write(dev, 0x0104, 0x00004012); in ufx_config_ddr2()
475 check_warn_return(status, "error writing 0x0104"); in ufx_config_ddr2()
477 status = ufx_reg_write(dev, 0x0118, 0x40404040); in ufx_config_ddr2()
478 check_warn_return(status, "error writing 0x0118"); in ufx_config_ddr2()
480 status = ufx_reg_write(dev, 0x0000, 0x00000001); in ufx_config_ddr2()
481 check_warn_return(status, "error writing 0x0000"); in ufx_config_ddr2()
484 status = ufx_reg_read(dev, 0x0000, &tmp); in ufx_config_ddr2()
485 check_warn_return(status, "error reading 0x0000"); in ufx_config_ddr2()
618 int status; in ufx_config_pix_clk() local
630 status = ufx_reg_write(dev, 0x7000, 0x8000000F); in ufx_config_pix_clk()
631 check_warn_return(status, "error writing 0x7000"); in ufx_config_pix_clk()
635 status = ufx_reg_write(dev, 0x7008, value); in ufx_config_pix_clk()
636 check_warn_return(status, "error writing 0x7008"); in ufx_config_pix_clk()
640 status = ufx_reg_write(dev, 0x7004, value); in ufx_config_pix_clk()
641 check_warn_return(status, "error writing 0x7004"); in ufx_config_pix_clk()
643 status = ufx_reg_clear_bits(dev, 0x7000, 0x00000005); in ufx_config_pix_clk()
644 check_warn_return(status, in ufx_config_pix_clk()
648 status = ufx_reg_clear_bits(dev, 0x7000, 0x0000000A); in ufx_config_pix_clk()
649 check_warn_return(status, in ufx_config_pix_clk()
653 status = ufx_reg_clear_bits(dev, 0x7000, 0x80000000); in ufx_config_pix_clk()
654 check_warn_return(status, "error clearing gate bits in 0x7000"); in ufx_config_pix_clk()
665 int status = ufx_reg_write(dev, 0x8028, 0); in ufx_set_vid_mode() local
666 check_warn_return(status, "ufx_set_vid_mode error disabling RGB pad"); in ufx_set_vid_mode()
668 status = ufx_reg_write(dev, 0x8024, 0); in ufx_set_vid_mode()
669 check_warn_return(status, "ufx_set_vid_mode error disabling VDAC"); in ufx_set_vid_mode()
672 status = ufx_blank(dev, true); in ufx_set_vid_mode()
673 check_warn_return(status, "ufx_set_vid_mode error blanking display"); in ufx_set_vid_mode()
675 status = ufx_disable(dev, true); in ufx_set_vid_mode()
676 check_warn_return(status, "ufx_set_vid_mode error disabling display"); in ufx_set_vid_mode()
678 status = ufx_config_pix_clk(dev, var->pixclock); in ufx_set_vid_mode()
679 check_warn_return(status, "ufx_set_vid_mode error configuring pixclock"); in ufx_set_vid_mode()
681 status = ufx_reg_write(dev, 0x2000, 0x00000104); in ufx_set_vid_mode()
682 check_warn_return(status, "ufx_set_vid_mode error writing 0x2000"); in ufx_set_vid_mode()
693 status = ufx_reg_write(dev, 0x2008, temp); in ufx_set_vid_mode()
694 check_warn_return(status, "ufx_set_vid_mode error writing 0x2008"); in ufx_set_vid_mode()
697 status = ufx_reg_write(dev, 0x200C, temp); in ufx_set_vid_mode()
698 check_warn_return(status, "ufx_set_vid_mode error writing 0x200C"); in ufx_set_vid_mode()
701 status = ufx_reg_write(dev, 0x2010, temp); in ufx_set_vid_mode()
702 check_warn_return(status, "ufx_set_vid_mode error writing 0x2010"); in ufx_set_vid_mode()
713 status = ufx_reg_write(dev, 0x2014, temp); in ufx_set_vid_mode()
714 check_warn_return(status, "ufx_set_vid_mode error writing 0x2014"); in ufx_set_vid_mode()
717 status = ufx_reg_write(dev, 0x2018, temp); in ufx_set_vid_mode()
718 check_warn_return(status, "ufx_set_vid_mode error writing 0x2018"); in ufx_set_vid_mode()
721 status = ufx_reg_write(dev, 0x201C, temp); in ufx_set_vid_mode()
722 check_warn_return(status, "ufx_set_vid_mode error writing 0x201C"); in ufx_set_vid_mode()
724 status = ufx_reg_write(dev, 0x2020, 0x00000000); in ufx_set_vid_mode()
725 check_warn_return(status, "ufx_set_vid_mode error writing 0x2020"); in ufx_set_vid_mode()
727 status = ufx_reg_write(dev, 0x2024, 0x00000000); in ufx_set_vid_mode()
728 check_warn_return(status, "ufx_set_vid_mode error writing 0x2024"); in ufx_set_vid_mode()
733 status = ufx_reg_write(dev, 0x2028, temp); in ufx_set_vid_mode()
734 check_warn_return(status, "ufx_set_vid_mode error writing 0x2028"); in ufx_set_vid_mode()
737 status = ufx_reg_write(dev, 0x2040, 0); in ufx_set_vid_mode()
738 check_warn_return(status, "ufx_set_vid_mode error writing 0x2040"); in ufx_set_vid_mode()
740 status = ufx_reg_write(dev, 0x2044, 0); in ufx_set_vid_mode()
741 check_warn_return(status, "ufx_set_vid_mode error writing 0x2044"); in ufx_set_vid_mode()
743 status = ufx_reg_write(dev, 0x2048, 0); in ufx_set_vid_mode()
744 check_warn_return(status, "ufx_set_vid_mode error writing 0x2048"); in ufx_set_vid_mode()
754 status = ufx_reg_write(dev, 0x2040, temp); in ufx_set_vid_mode()
755 check_warn_return(status, "ufx_set_vid_mode error writing 0x2040"); in ufx_set_vid_mode()
758 status = ufx_enable(dev, true); in ufx_set_vid_mode()
759 check_warn_return(status, "ufx_set_vid_mode error enabling display"); in ufx_set_vid_mode()
762 status = ufx_unblank(dev, true); in ufx_set_vid_mode()
763 check_warn_return(status, "ufx_set_vid_mode error unblanking display"); in ufx_set_vid_mode()
766 status = ufx_reg_write(dev, 0x8028, 0x00000003); in ufx_set_vid_mode()
767 check_warn_return(status, "ufx_set_vid_mode error enabling RGB pad"); in ufx_set_vid_mode()
770 status = ufx_reg_write(dev, 0x8024, 0x00000007); in ufx_set_vid_mode()
771 check_warn_return(status, "ufx_set_vid_mode error enabling VDAC"); in ufx_set_vid_mode()
854 int len, status, urb_lines, start_line = 0; in ufx_handle_damage() local
885 status = ufx_submit_urb(dev, urb, len); in ufx_handle_damage()
886 check_warn_return(status, "Error submitting URB"); in ufx_handle_damage()
1340 int status = ufx_reg_write(dev, 0x106C, 0x00); in ufx_i2c_init() local
1341 check_warn_return(status, "failed to disable I2C"); in ufx_i2c_init()
1345 status = ufx_reg_write(dev, 0x1018, 12); in ufx_i2c_init()
1346 check_warn_return(status, "error writing 0x1018"); in ufx_i2c_init()
1349 status = ufx_reg_write(dev, 0x1014, 6); in ufx_i2c_init()
1350 check_warn_return(status, "error writing 0x1014"); in ufx_i2c_init()
1352 status = ufx_reg_read(dev, 0x1000, &tmp); in ufx_i2c_init()
1353 check_warn_return(status, "error reading 0x1000"); in ufx_i2c_init()
1365 status = ufx_reg_write(dev, 0x1000, tmp); in ufx_i2c_init()
1366 check_warn_return(status, "error writing 0x1000"); in ufx_i2c_init()
1369 status = ufx_reg_clear_and_set_bits(dev, 0x1004, 0xC00, 0x000); in ufx_i2c_init()
1370 check_warn_return(status, "error setting TX mode bits in 0x1004"); in ufx_i2c_init()
1373 status = ufx_reg_write(dev, 0x106C, 0x01); in ufx_i2c_init()
1374 check_warn_return(status, "failed to enable I2C"); in ufx_i2c_init()
1382 int status = ufx_reg_write(dev, 0x106C, 0x00); in ufx_i2c_configure() local
1383 check_warn_return(status, "failed to disable I2C"); in ufx_i2c_configure()
1385 status = ufx_reg_write(dev, 0x3010, 0x00000000); in ufx_i2c_configure()
1386 check_warn_return(status, "failed to write 0x3010"); in ufx_i2c_configure()
1389 status = ufx_reg_clear_and_set_bits(dev, 0x1004, 0x3FF, (0xA0 >> 1)); in ufx_i2c_configure()
1390 check_warn_return(status, "failed to set TAR bits in 0x1004"); in ufx_i2c_configure()
1392 status = ufx_reg_write(dev, 0x106C, 0x01); in ufx_i2c_configure()
1393 check_warn_return(status, "failed to enable I2C"); in ufx_i2c_configure()
1403 int i, status; in ufx_i2c_wait_busy() local
1406 status = ufx_reg_read(dev, 0x1100, &tmp); in ufx_i2c_wait_busy()
1407 check_warn_return(status, "0x1100 read failed"); in ufx_i2c_wait_busy()
1425 status = ufx_reg_write(dev, 0x1100, 0x40000000); in ufx_i2c_wait_busy()
1426 check_warn_return(status, "0x1100 write failed"); in ufx_i2c_wait_busy()
1434 int i, j, status; in ufx_read_edid() local
1439 status = ufx_i2c_configure(dev); in ufx_read_edid()
1440 if (status < 0) { in ufx_read_edid()
1442 return status; in ufx_read_edid()
1450 status = ufx_reg_write(dev, 0x1100, temp); in ufx_read_edid()
1451 check_warn_return(status, "Failed to write 0x1100"); in ufx_read_edid()
1454 status = ufx_reg_write(dev, 0x1100, temp); in ufx_read_edid()
1455 check_warn_return(status, "Failed to write 0x1100"); in ufx_read_edid()
1457 status = ufx_i2c_wait_busy(dev); in ufx_read_edid()
1458 check_warn_return(status, "Timeout waiting for I2C BUSY to clear"); in ufx_read_edid()
1462 status = ufx_reg_read(dev, data_reg_addr, edid_u32++); in ufx_read_edid()
1463 check_warn_return(status, "Error reading i2c data"); in ufx_read_edid()
1798 if (urb->status) { in ufx_urb_completion()
1799 if (!(urb->status == -ENOENT || in ufx_urb_completion()
1800 urb->status == -ECONNRESET || in ufx_urb_completion()
1801 urb->status == -ESHUTDOWN)) { in ufx_urb_completion()
1803 __func__, urb->status); in ufx_urb_completion()