Lines Matching refs:cinfo
380 static void switch_monitor(struct cirrusfb_info *cinfo, int on);
381 static void WGen(const struct cirrusfb_info *cinfo,
383 static unsigned char RGen(const struct cirrusfb_info *cinfo, int regnum);
384 static void AttrOn(const struct cirrusfb_info *cinfo);
385 static void WHDR(const struct cirrusfb_info *cinfo, unsigned char val);
386 static void WSFR(struct cirrusfb_info *cinfo, unsigned char val);
387 static void WSFR2(struct cirrusfb_info *cinfo, unsigned char val);
388 static void WClut(struct cirrusfb_info *cinfo, unsigned char regnum,
391 static void RClut(struct cirrusfb_info *cinfo, unsigned char regnum,
420 static inline int is_laguna(const struct cirrusfb_info *cinfo) in is_laguna() argument
422 return cinfo->btype == BT_LAGUNA || cinfo->btype == BT_LAGUNAB; in is_laguna()
450 struct cirrusfb_info *cinfo = info->par; in cirrusfb_check_mclk() local
451 long mclk = vga_rseq(cinfo->regbase, CL_SEQR1F) & 0x3f; in cirrusfb_check_mclk()
477 struct cirrusfb_info *cinfo = info->par; in cirrusfb_check_pixclock() local
483 maxclock = cirrusfb_board_info[cinfo->btype].maxclock[maxclockidx]; in cirrusfb_check_pixclock()
484 cinfo->multiplexing = 0; in cirrusfb_check_pixclock()
501 switch (cinfo->btype) { in cirrusfb_check_pixclock()
506 cinfo->multiplexing = 1; in cirrusfb_check_pixclock()
510 cinfo->multiplexing = 1; in cirrusfb_check_pixclock()
520 cinfo->doubleVCLK = 0; in cirrusfb_check_pixclock()
521 if (cinfo->btype == BT_SD64 && info->fix.smem_len <= MB_ && in cirrusfb_check_pixclock()
523 cinfo->doubleVCLK = 1; in cirrusfb_check_pixclock()
535 struct cirrusfb_info *cinfo = info->par; in cirrusfb_check_var() local
625 if (!is_laguna(cinfo)) in cirrusfb_check_var()
633 struct cirrusfb_info *cinfo = info->par; in cirrusfb_set_mclk_as_source() local
636 assert(cinfo != NULL); in cirrusfb_set_mclk_as_source()
637 old1f = vga_rseq(cinfo->regbase, CL_SEQR1F) & ~0x40; in cirrusfb_set_mclk_as_source()
643 old1e = vga_rseq(cinfo->regbase, CL_SEQR1E) & ~0x1; in cirrusfb_set_mclk_as_source()
647 vga_wseq(cinfo->regbase, CL_SEQR1E, old1e); in cirrusfb_set_mclk_as_source()
649 vga_wseq(cinfo->regbase, CL_SEQR1F, old1f); in cirrusfb_set_mclk_as_source()
659 struct cirrusfb_info *cinfo = info->par; in cirrusfb_set_par_foo() local
661 u8 __iomem *regbase = cinfo->regbase; in cirrusfb_set_par_foo()
696 bi = &cirrusfb_board_info[cinfo->btype]; in cirrusfb_set_par_foo()
734 if (cinfo->multiplexing) { in cirrusfb_set_par_foo()
837 if (cinfo->btype == BT_ALPINE || cinfo->btype == BT_SD64) in cirrusfb_set_par_foo()
839 if (cinfo->multiplexing) in cirrusfb_set_par_foo()
841 if (cinfo->doubleVCLK) in cirrusfb_set_par_foo()
854 if (cinfo->btype == BT_ALPINE || cinfo->btype == BT_PICASSO4 || in cirrusfb_set_par_foo()
855 cinfo->btype == BT_SD64) { in cirrusfb_set_par_foo()
864 if (is_laguna(cinfo)) { in cirrusfb_set_par_foo()
865 long pcifc = fb_readl(cinfo->laguna_mmio + 0x3fc); in cirrusfb_set_par_foo()
866 unsigned char tile = fb_readb(cinfo->laguna_mmio + 0x407); in cirrusfb_set_par_foo()
869 if (cinfo->btype == BT_LAGUNAB) { in cirrusfb_set_par_foo()
870 tile_control = fb_readw(cinfo->laguna_mmio + 0x2c4); in cirrusfb_set_par_foo()
872 fb_writew(tile_control, cinfo->laguna_mmio + 0x2c4); in cirrusfb_set_par_foo()
875 fb_writel(pcifc | 0x10000000l, cinfo->laguna_mmio + 0x3fc); in cirrusfb_set_par_foo()
876 fb_writeb(tile & 0x3f, cinfo->laguna_mmio + 0x407); in cirrusfb_set_par_foo()
877 control = fb_readw(cinfo->laguna_mmio + 0x402); in cirrusfb_set_par_foo()
878 threshold = fb_readw(cinfo->laguna_mmio + 0xea); in cirrusfb_set_par_foo()
888 if ((cinfo->btype == BT_SD64) || in cirrusfb_set_par_foo()
889 (cinfo->btype == BT_ALPINE) || in cirrusfb_set_par_foo()
890 (cinfo->btype == BT_GD5480)) in cirrusfb_set_par_foo()
894 if (is_laguna(cinfo)) { in cirrusfb_set_par_foo()
925 WGen(cinfo, VGA_MIS_W, tmp); in cirrusfb_set_par_foo()
944 switch (cinfo->btype) { in cirrusfb_set_par_foo()
953 cinfo->multiplexing ? in cirrusfb_set_par_foo()
969 switch (cinfo->btype) { in cirrusfb_set_par_foo()
997 WGen(cinfo, VGA_PEL_MSK, 0x01); in cirrusfb_set_par_foo()
998 if (cinfo->multiplexing) in cirrusfb_set_par_foo()
1000 WHDR(cinfo, 0x4a); in cirrusfb_set_par_foo()
1003 WHDR(cinfo, 0); in cirrusfb_set_par_foo()
1018 switch (cinfo->btype) { in cirrusfb_set_par_foo()
1027 cinfo->multiplexing ? in cirrusfb_set_par_foo()
1043 switch (cinfo->btype) { in cirrusfb_set_par_foo()
1071 if (cinfo->multiplexing) in cirrusfb_set_par_foo()
1073 WHDR(cinfo, 0x4a); in cirrusfb_set_par_foo()
1076 WHDR(cinfo, 0); in cirrusfb_set_par_foo()
1087 switch (cinfo->btype) { in cirrusfb_set_par_foo()
1106 cinfo->doubleVCLK ? 0xa3 : 0xa7); in cirrusfb_set_par_foo()
1131 WHDR(cinfo, cinfo->doubleVCLK ? 0xe1 : 0xc1); in cirrusfb_set_par_foo()
1134 WHDR(cinfo, 0xa0); /* hidden dac reg: nothing special */ in cirrusfb_set_par_foo()
1146 switch (cinfo->btype) { in cirrusfb_set_par_foo()
1189 WHDR(cinfo, 0xc5); in cirrusfb_set_par_foo()
1213 if (cirrusfb_board_info[cinfo->btype].scrn_start_bit19) in cirrusfb_set_par_foo()
1216 if (is_laguna(cinfo)) { in cirrusfb_set_par_foo()
1240 AttrOn(cinfo); in cirrusfb_set_par_foo()
1242 if (is_laguna(cinfo)) { in cirrusfb_set_par_foo()
1244 fb_writew(control | 0x1000, cinfo->laguna_mmio + 0x402); in cirrusfb_set_par_foo()
1245 fb_writew(format, cinfo->laguna_mmio + 0xc0); in cirrusfb_set_par_foo()
1246 fb_writew(threshold, cinfo->laguna_mmio + 0xea); in cirrusfb_set_par_foo()
1279 struct cirrusfb_info *cinfo = info->par; in cirrusfb_setcolreg() local
1296 cinfo->pseudo_palette[regno] = v; in cirrusfb_setcolreg()
1301 WClut(cinfo, regno, red >> 10, green >> 10, blue >> 10); in cirrusfb_setcolreg()
1318 struct cirrusfb_info *cinfo = info->par; in cirrusfb_pan_display() local
1337 if (!is_laguna(cinfo)) in cirrusfb_pan_display()
1338 cirrusfb_WaitBLT(cinfo->regbase); in cirrusfb_pan_display()
1341 vga_wcrt(cinfo->regbase, VGA_CRTC_START_LO, base & 0xff); in cirrusfb_pan_display()
1342 vga_wcrt(cinfo->regbase, VGA_CRTC_START_HI, (base >> 8) & 0xff); in cirrusfb_pan_display()
1345 tmp = vga_rcrt(cinfo->regbase, CL_CRT1B) & 0xf2; in cirrusfb_pan_display()
1354 vga_wcrt(cinfo->regbase, CL_CRT1B, tmp); in cirrusfb_pan_display()
1357 if (cirrusfb_board_info[cinfo->btype].scrn_start_bit19) { in cirrusfb_pan_display()
1358 tmp = vga_rcrt(cinfo->regbase, CL_CRT1D); in cirrusfb_pan_display()
1359 if (is_laguna(cinfo)) in cirrusfb_pan_display()
1363 vga_wcrt(cinfo->regbase, CL_CRT1D, tmp); in cirrusfb_pan_display()
1371 vga_wattr(cinfo->regbase, CL_AR33, xpix); in cirrusfb_pan_display()
1390 struct cirrusfb_info *cinfo = info->par; in cirrusfb_blank() local
1391 int current_mode = cinfo->blank_mode; in cirrusfb_blank()
1410 val |= vga_rseq(cinfo->regbase, VGA_SEQ_CLOCK_MODE) & 0xdf; in cirrusfb_blank()
1411 vga_wseq(cinfo->regbase, VGA_SEQ_CLOCK_MODE, val); in cirrusfb_blank()
1432 vga_wgfx(cinfo->regbase, CL_GRE, val); in cirrusfb_blank()
1434 cinfo->blank_mode = blank_mode; in cirrusfb_blank()
1447 struct cirrusfb_info *cinfo = info->par; in init_vgachip() local
1450 assert(cinfo != NULL); in init_vgachip()
1452 bi = &cirrusfb_board_info[cinfo->btype]; in init_vgachip()
1455 switch (cinfo->btype) { in init_vgachip()
1457 WSFR(cinfo, 0x01); in init_vgachip()
1459 WSFR(cinfo, 0x51); in init_vgachip()
1463 WSFR2(cinfo, 0xff); in init_vgachip()
1468 WSFR(cinfo, 0x1f); in init_vgachip()
1470 WSFR(cinfo, 0x4f); in init_vgachip()
1475 vga_wcrt(cinfo->regbase, CL_CRT51, 0x00); in init_vgachip()
1478 vga_wgfx(cinfo->regbase, CL_GR31, 0x00); in init_vgachip()
1482 vga_wgfx(cinfo->regbase, CL_GR2F, 0x00); in init_vgachip()
1486 vga_wgfx(cinfo->regbase, CL_GR33, 0x00); in init_vgachip()
1506 if (cinfo->btype != BT_PICASSO4) { in init_vgachip()
1507 WGen(cinfo, CL_VSSM, 0x10); /* EGS: 0x16 */ in init_vgachip()
1508 WGen(cinfo, CL_POS102, 0x01); in init_vgachip()
1509 WGen(cinfo, CL_VSSM, 0x08); /* EGS: 0x0e */ in init_vgachip()
1511 if (cinfo->btype != BT_SD64) in init_vgachip()
1512 WGen(cinfo, CL_VSSM2, 0x01); in init_vgachip()
1515 vga_wseq(cinfo->regbase, VGA_SEQ_RESET, 0x03); in init_vgachip()
1518 vga_wseq(cinfo->regbase, VGA_SEQ_CLOCK_MODE, 0x21); in init_vgachip()
1523 vga_wseq(cinfo->regbase, CL_SEQR6, 0x12); in init_vgachip()
1525 switch (cinfo->btype) { in init_vgachip()
1527 vga_wseq(cinfo->regbase, CL_SEQRF, 0x98); in init_vgachip()
1535 vga_wseq(cinfo->regbase, CL_SEQRF, 0xb8); in init_vgachip()
1539 vga_wseq(cinfo->regbase, CL_SEQR16, 0x0f); in init_vgachip()
1540 vga_wseq(cinfo->regbase, CL_SEQRF, 0xb0); in init_vgachip()
1545 vga_wseq(cinfo->regbase, VGA_SEQ_PLANE_WRITE, 0xff); in init_vgachip()
1547 vga_wseq(cinfo->regbase, VGA_SEQ_CHARACTER_MAP, 0x00); in init_vgachip()
1549 vga_wseq(cinfo->regbase, VGA_SEQ_MEMORY_MODE, 0x0a); in init_vgachip()
1553 vga_wseq(cinfo->regbase, CL_SEQR7, bi->sr07); in init_vgachip()
1559 vga_wseq(cinfo->regbase, CL_SEQR10, 0x00); in init_vgachip()
1561 vga_wseq(cinfo->regbase, CL_SEQR11, 0x00); in init_vgachip()
1563 vga_wseq(cinfo->regbase, CL_SEQR12, 0x00); in init_vgachip()
1565 vga_wseq(cinfo->regbase, CL_SEQR13, 0x00); in init_vgachip()
1568 if (cinfo->btype != BT_PICASSO4) { in init_vgachip()
1570 vga_wseq(cinfo->regbase, CL_SEQR17, 0x00); in init_vgachip()
1572 vga_wseq(cinfo->regbase, CL_SEQR18, 0x02); in init_vgachip()
1576 vga_wcrt(cinfo->regbase, VGA_CRTC_PRESET_ROW, 0x00); in init_vgachip()
1578 vga_wcrt(cinfo->regbase, VGA_CRTC_CURSOR_START, 0x20); in init_vgachip()
1580 vga_wcrt(cinfo->regbase, VGA_CRTC_CURSOR_END, 0x00); in init_vgachip()
1582 vga_wcrt(cinfo->regbase, VGA_CRTC_CURSOR_HI, 0x00); in init_vgachip()
1584 vga_wcrt(cinfo->regbase, VGA_CRTC_CURSOR_LO, 0x00); in init_vgachip()
1587 vga_wcrt(cinfo->regbase, VGA_CRTC_UNDERLINE, 0x00); in init_vgachip()
1590 vga_wcrt(cinfo->regbase, CL_CRT1B, 0x02); in init_vgachip()
1593 vga_wgfx(cinfo->regbase, VGA_GFX_SR_VALUE, 0x00); in init_vgachip()
1595 vga_wgfx(cinfo->regbase, VGA_GFX_SR_ENABLE, 0x00); in init_vgachip()
1597 vga_wgfx(cinfo->regbase, VGA_GFX_COMPARE_VALUE, 0x00); in init_vgachip()
1599 vga_wgfx(cinfo->regbase, VGA_GFX_DATA_ROTATE, 0x00); in init_vgachip()
1601 vga_wgfx(cinfo->regbase, VGA_GFX_PLANE_READ, 0x00); in init_vgachip()
1603 vga_wgfx(cinfo->regbase, VGA_GFX_MODE, 0x00); in init_vgachip()
1605 vga_wgfx(cinfo->regbase, VGA_GFX_MISC, 0x01); in init_vgachip()
1607 vga_wgfx(cinfo->regbase, VGA_GFX_COMPARE_MASK, 0x0f); in init_vgachip()
1609 vga_wgfx(cinfo->regbase, VGA_GFX_BIT_MASK, 0xff); in init_vgachip()
1611 if (cinfo->btype == BT_ALPINE || cinfo->btype == BT_SD64 || in init_vgachip()
1612 is_laguna(cinfo)) in init_vgachip()
1614 vga_wgfx(cinfo->regbase, CL_GRB, 0x20); in init_vgachip()
1619 vga_wgfx(cinfo->regbase, CL_GRB, 0x28); in init_vgachip()
1621 vga_wgfx(cinfo->regbase, CL_GRC, 0xff); /* Color Key compare: - */ in init_vgachip()
1622 vga_wgfx(cinfo->regbase, CL_GRD, 0x00); /* Color Key compare mask: - */ in init_vgachip()
1623 vga_wgfx(cinfo->regbase, CL_GRE, 0x00); /* Miscellaneous control: - */ in init_vgachip()
1629 vga_wattr(cinfo->regbase, VGA_ATC_PALETTE0, 0x00); in init_vgachip()
1630 vga_wattr(cinfo->regbase, VGA_ATC_PALETTE1, 0x01); in init_vgachip()
1631 vga_wattr(cinfo->regbase, VGA_ATC_PALETTE2, 0x02); in init_vgachip()
1632 vga_wattr(cinfo->regbase, VGA_ATC_PALETTE3, 0x03); in init_vgachip()
1633 vga_wattr(cinfo->regbase, VGA_ATC_PALETTE4, 0x04); in init_vgachip()
1634 vga_wattr(cinfo->regbase, VGA_ATC_PALETTE5, 0x05); in init_vgachip()
1635 vga_wattr(cinfo->regbase, VGA_ATC_PALETTE6, 0x06); in init_vgachip()
1636 vga_wattr(cinfo->regbase, VGA_ATC_PALETTE7, 0x07); in init_vgachip()
1637 vga_wattr(cinfo->regbase, VGA_ATC_PALETTE8, 0x08); in init_vgachip()
1638 vga_wattr(cinfo->regbase, VGA_ATC_PALETTE9, 0x09); in init_vgachip()
1639 vga_wattr(cinfo->regbase, VGA_ATC_PALETTEA, 0x0a); in init_vgachip()
1640 vga_wattr(cinfo->regbase, VGA_ATC_PALETTEB, 0x0b); in init_vgachip()
1641 vga_wattr(cinfo->regbase, VGA_ATC_PALETTEC, 0x0c); in init_vgachip()
1642 vga_wattr(cinfo->regbase, VGA_ATC_PALETTED, 0x0d); in init_vgachip()
1643 vga_wattr(cinfo->regbase, VGA_ATC_PALETTEE, 0x0e); in init_vgachip()
1644 vga_wattr(cinfo->regbase, VGA_ATC_PALETTEF, 0x0f); in init_vgachip()
1647 vga_wattr(cinfo->regbase, VGA_ATC_MODE, 0x01); in init_vgachip()
1649 vga_wattr(cinfo->regbase, VGA_ATC_OVERSCAN, 0x00); in init_vgachip()
1651 vga_wattr(cinfo->regbase, VGA_ATC_PLANE_ENABLE, 0x0f); in init_vgachip()
1653 vga_wattr(cinfo->regbase, VGA_ATC_COLOR_PAGE, 0x00); in init_vgachip()
1655 WGen(cinfo, VGA_PEL_MSK, 0xff); /* Pixel mask: no mask */ in init_vgachip()
1658 vga_wgfx(cinfo->regbase, CL_GR31, 0x04); in init_vgachip()
1660 vga_wgfx(cinfo->regbase, CL_GR31, 0x00); in init_vgachip()
1663 WHDR(cinfo, 0); /* Hidden DAC register: - */ in init_vgachip()
1667 static void switch_monitor(struct cirrusfb_info *cinfo, int on) in switch_monitor() argument
1672 if (cinfo->btype == BT_PICASSO4) in switch_monitor()
1674 if (cinfo->btype == BT_ALPINE) in switch_monitor()
1676 if (cinfo->btype == BT_GD5480) in switch_monitor()
1678 if (cinfo->btype == BT_PICASSO) { in switch_monitor()
1680 WSFR(cinfo, 0xff); in switch_monitor()
1684 switch (cinfo->btype) { in switch_monitor()
1686 WSFR(cinfo, cinfo->SFR | 0x21); in switch_monitor()
1689 WSFR(cinfo, cinfo->SFR | 0x28); in switch_monitor()
1692 WSFR(cinfo, 0x6f); in switch_monitor()
1697 switch (cinfo->btype) { in switch_monitor()
1699 WSFR(cinfo, cinfo->SFR & 0xde); in switch_monitor()
1702 WSFR(cinfo, cinfo->SFR & 0xd7); in switch_monitor()
1705 WSFR(cinfo, 0x4f); in switch_monitor()
1720 struct cirrusfb_info *cinfo = info->par; in cirrusfb_sync() local
1722 if (!is_laguna(cinfo)) { in cirrusfb_sync()
1723 while (vga_rgfx(cinfo->regbase, CL_GR31) & 0x03) in cirrusfb_sync()
1734 struct cirrusfb_info *cinfo = info->par; in cirrusfb_fillrect() local
1737 cinfo->pseudo_palette[region->color] : region->color; in cirrusfb_fillrect()
1760 cirrusfb_RectFill(cinfo->regbase, in cirrusfb_fillrect()
1773 struct cirrusfb_info *cinfo = info->par; in cirrusfb_copyarea() local
1801 cirrusfb_BitBLT(cinfo->regbase, info->var.bits_per_pixel, in cirrusfb_copyarea()
1812 struct cirrusfb_info *cinfo = info->par; in cirrusfb_imageblit() local
1820 else if ((cinfo->btype == BT_ALPINE || cinfo->btype == BT_SD64) && in cirrusfb_imageblit()
1837 cirrusfb_RectFill(cinfo->regbase, in cirrusfb_imageblit()
1845 cirrusfb_RectFill(cinfo->regbase, in cirrusfb_imageblit()
1866 struct cirrusfb_info *cinfo = info->par; in cirrusfb_get_memsize() local
1868 if (is_laguna(cinfo)) { in cirrusfb_get_memsize()
1894 if (cinfo->btype != BT_ALPINE && (SRF & 0x80) != 0) in cirrusfb_get_memsize()
1928 struct cirrusfb_info *cinfo = info->par; in cirrusfb_pci_unmap() local
1930 if (cinfo->laguna_mmio == NULL) in cirrusfb_pci_unmap()
1931 iounmap(cinfo->laguna_mmio); in cirrusfb_pci_unmap()
1945 struct cirrusfb_info *cinfo = info->par; in cirrusfb_zorro_unmap() local
1951 iounmap(cinfo->regbase); in cirrusfb_zorro_unmap()
1975 struct cirrusfb_info *cinfo = info->par; in cirrusfb_set_fbinfo() local
1978 info->pseudo_palette = cinfo->pseudo_palette; in cirrusfb_set_fbinfo()
1985 if (noaccel || is_laguna(cinfo)) { in cirrusfb_set_fbinfo()
1993 if (cinfo->btype == BT_GD5480) { in cirrusfb_set_fbinfo()
2001 strlcpy(info->fix.id, cirrusfb_board_info[cinfo->btype].name, in cirrusfb_set_fbinfo()
2024 struct cirrusfb_info *cinfo = info->par; in cirrusfb_register() local
2028 assert(cinfo->btype != BT_NONE); in cirrusfb_register()
2068 struct cirrusfb_info *cinfo = info->par; in cirrusfb_cleanup() local
2070 switch_monitor(cinfo, 0); in cirrusfb_cleanup()
2074 cinfo->unmap(info); in cirrusfb_cleanup()
2082 struct cirrusfb_info *cinfo; in cirrusfb_pci_register() local
2099 cinfo = info->par; in cirrusfb_pci_register()
2100 cinfo->btype = (enum cirrus_board) ent->driver_data; in cirrusfb_pci_register()
2104 (unsigned long long)pdev->resource[0].start, cinfo->btype); in cirrusfb_pci_register()
2112 cinfo->regbase = NULL; in cirrusfb_pci_register()
2113 cinfo->laguna_mmio = ioremap(info->fix.mmio_start, 0x1000); in cirrusfb_pci_register()
2118 board_size = (cinfo->btype == BT_GD5480) ? in cirrusfb_pci_register()
2119 32 * MB_ : cirrusfb_get_memsize(info, cinfo->regbase); in cirrusfb_pci_register()
2146 cinfo->unmap = cirrusfb_pci_unmap; in cirrusfb_pci_register()
2167 if (cinfo->laguna_mmio != NULL) in cirrusfb_pci_register()
2168 iounmap(cinfo->laguna_mmio); in cirrusfb_pci_register()
2204 struct cirrusfb_info *cinfo; in cirrusfb_zorro_register() local
2252 cinfo = info->par; in cirrusfb_zorro_register()
2253 cinfo->btype = btype; in cirrusfb_zorro_register()
2256 cinfo->regbase = regbase > 16 * MB_ ? ioremap(regbase, 64 * 1024) in cirrusfb_zorro_register()
2258 if (!cinfo->regbase) { in cirrusfb_zorro_register()
2274 cinfo->unmap = cirrusfb_zorro_unmap; in cirrusfb_zorro_register()
2282 vga_wseq(cinfo->regbase, CL_SEQR1F, in cirrusfb_zorro_register()
2301 iounmap(cinfo->regbase); in cirrusfb_zorro_register()
2406 static void WGen(const struct cirrusfb_info *cinfo, in WGen() argument
2411 if (cinfo->btype == BT_PICASSO) { in WGen()
2419 vga_w(cinfo->regbase, regofs + regnum, val); in WGen()
2423 static unsigned char RGen(const struct cirrusfb_info *cinfo, int regnum) in RGen() argument
2427 if (cinfo->btype == BT_PICASSO) { in RGen()
2435 return vga_r(cinfo->regbase, regofs + regnum); in RGen()
2439 static void AttrOn(const struct cirrusfb_info *cinfo) in AttrOn() argument
2441 assert(cinfo != NULL); in AttrOn()
2443 if (vga_rcrt(cinfo->regbase, CL_CRT24) & 0x80) { in AttrOn()
2446 vga_w(cinfo->regbase, VGA_ATT_IW, in AttrOn()
2447 vga_r(cinfo->regbase, VGA_ATT_R)); in AttrOn()
2451 vga_w(cinfo->regbase, VGA_ATT_IW, 0x33); in AttrOn()
2454 vga_w(cinfo->regbase, VGA_ATT_IW, 0x00); in AttrOn()
2463 static void WHDR(const struct cirrusfb_info *cinfo, unsigned char val) in WHDR() argument
2467 if (is_laguna(cinfo)) in WHDR()
2469 if (cinfo->btype == BT_PICASSO) { in WHDR()
2472 WGen(cinfo, VGA_PEL_MSK, 0x00); in WHDR()
2475 dummy = RGen(cinfo, VGA_PEL_IW); in WHDR()
2480 dummy = RGen(cinfo, VGA_PEL_MSK); in WHDR()
2482 dummy = RGen(cinfo, VGA_PEL_MSK); in WHDR()
2484 dummy = RGen(cinfo, VGA_PEL_MSK); in WHDR()
2486 dummy = RGen(cinfo, VGA_PEL_MSK); in WHDR()
2489 WGen(cinfo, VGA_PEL_MSK, val); in WHDR()
2492 if (cinfo->btype == BT_PICASSO) { in WHDR()
2494 dummy = RGen(cinfo, VGA_PEL_IW); in WHDR()
2499 WGen(cinfo, VGA_PEL_MSK, 0xff); in WHDR()
2505 static void WSFR(struct cirrusfb_info *cinfo, unsigned char val) in WSFR() argument
2508 assert(cinfo->regbase != NULL); in WSFR()
2509 cinfo->SFR = val; in WSFR()
2510 z_writeb(val, cinfo->regbase + 0x8000); in WSFR()
2515 static void WSFR2(struct cirrusfb_info *cinfo, unsigned char val) in WSFR2() argument
2520 assert(cinfo->regbase != NULL); in WSFR2()
2521 cinfo->SFR = val; in WSFR2()
2522 z_writeb(val, cinfo->regbase + 0x9000); in WSFR2()
2527 static void WClut(struct cirrusfb_info *cinfo, unsigned char regnum, unsigned char red, in WClut() argument
2533 vga_w(cinfo->regbase, VGA_PEL_IW, regnum); in WClut()
2535 if (cinfo->btype == BT_PICASSO || cinfo->btype == BT_PICASSO4 || in WClut()
2536 cinfo->btype == BT_ALPINE || cinfo->btype == BT_GD5480 || in WClut()
2537 cinfo->btype == BT_SD64 || is_laguna(cinfo)) { in WClut()
2539 if (cinfo->btype == BT_PICASSO) in WClut()
2541 vga_w(cinfo->regbase, data, red); in WClut()
2542 vga_w(cinfo->regbase, data, green); in WClut()
2543 vga_w(cinfo->regbase, data, blue); in WClut()
2545 vga_w(cinfo->regbase, data, blue); in WClut()
2546 vga_w(cinfo->regbase, data, green); in WClut()
2547 vga_w(cinfo->regbase, data, red); in WClut()
2553 static void RClut(struct cirrusfb_info *cinfo, unsigned char regnum, unsigned char *red,
2558 vga_w(cinfo->regbase, VGA_PEL_IR, regnum);
2560 if (cinfo->btype == BT_PICASSO || cinfo->btype == BT_PICASSO4 ||
2561 cinfo->btype == BT_ALPINE || cinfo->btype == BT_GD5480) {
2562 if (cinfo->btype == BT_PICASSO)
2564 *red = vga_r(cinfo->regbase, data);
2565 *green = vga_r(cinfo->regbase, data);
2566 *blue = vga_r(cinfo->regbase, data);
2568 *blue = vga_r(cinfo->regbase, data);
2569 *green = vga_r(cinfo->regbase, data);
2570 *red = vga_r(cinfo->regbase, data);