Lines Matching full:xclk
317 static int xclk; variable
373 int pll, mclk, xclk, ecp_max; member
462 par->pll_limits.xclk = aty_chips[i].xclk; in correct_chipset()
490 par->pll_limits.xclk = 67; in correct_chipset()
498 par->pll_limits.xclk = 67; in correct_chipset()
508 par->pll_limits.xclk = 67; in correct_chipset()
516 par->pll_limits.xclk = 67; in correct_chipset()
528 par->pll_limits.xclk = 67; in correct_chipset()
536 par->pll_limits.xclk = 67; in correct_chipset()
2289 static void aty_calc_mem_refresh(struct atyfb_par *par, int xclk) in aty_calc_mem_refresh() argument
2310 if (xclk < refresh_tbl[i]) in aty_calc_mem_refresh()
2431 /* Mobility + 32bit memory interface need halved XCLK. */ in aty_init()
2433 par->pll_limits.xclk = (par->pll_limits.xclk + 1) >> 1; in aty_init()
2443 par->pll_limits.xclk = 53; in aty_init()
2452 if (xclk) in aty_init()
2453 par->pll_limits.xclk = xclk; in aty_init()
2455 aty_calc_mem_refresh(par, par->pll_limits.xclk); in aty_init()
2458 par->xclk_per = 1000000/par->pll_limits.xclk; in aty_init()
2580 PRINTKI("%d%c %s, %s MHz XTAL, %d MHz PLL, %d Mhz MCLK, %d MHz XCLK\n", in aty_init()
2584 par->pll_limits.xclk); in aty_init()
3408 par->pll_limits.xclk = pll_block.XCLK_max_freq/100; in init_from_bios()
3848 else if (!strncmp(this_opt, "xclk:", 5)) in atyfb_setup()
3849 xclk = simple_strtoul(this_opt+5, NULL, 0); in atyfb_setup()
4004 module_param(xclk, int, 0);
4005 MODULE_PARM_DESC(xclk, "int: override accelerated engine clock");