Lines Matching refs:tbase
46 void __iomem *tbase = musb->ctrl_base; in tusb_get_revision() local
50 rev = musb_readl(tbase, TUSB_DMA_CTRL_REV) & 0xff; in tusb_get_revision()
52 die_id = TUSB_DIDR1_HI_CHIP_REV(musb_readl(tbase, in tusb_get_revision()
63 void __iomem *tbase = musb->ctrl_base; in tusb_print_revision() local
70 TUSB_REV_MAJOR(musb_readl(tbase, TUSB_PRCM_REV)), in tusb_print_revision()
71 TUSB_REV_MINOR(musb_readl(tbase, TUSB_PRCM_REV)), in tusb_print_revision()
73 TUSB_REV_MAJOR(musb_readl(tbase, TUSB_INT_CTRL_REV)), in tusb_print_revision()
74 TUSB_REV_MINOR(musb_readl(tbase, TUSB_INT_CTRL_REV)), in tusb_print_revision()
76 TUSB_REV_MAJOR(musb_readl(tbase, TUSB_GPIO_REV)), in tusb_print_revision()
77 TUSB_REV_MINOR(musb_readl(tbase, TUSB_GPIO_REV)), in tusb_print_revision()
79 TUSB_REV_MAJOR(musb_readl(tbase, TUSB_DMA_CTRL_REV)), in tusb_print_revision()
80 TUSB_REV_MINOR(musb_readl(tbase, TUSB_DMA_CTRL_REV)), in tusb_print_revision()
82 TUSB_DIDR1_HI_CHIP_REV(musb_readl(tbase, TUSB_DIDR1_HI)), in tusb_print_revision()
96 void __iomem *tbase = musb->ctrl_base; in tusb_wbus_quirk() local
101 phy_otg_ctrl = musb_readl(tbase, TUSB_PHY_OTG_CTRL); in tusb_wbus_quirk()
102 phy_otg_ena = musb_readl(tbase, TUSB_PHY_OTG_CTRL_ENABLE); in tusb_wbus_quirk()
105 musb_writel(tbase, TUSB_PHY_OTG_CTRL, tmp); in tusb_wbus_quirk()
108 musb_writel(tbase, TUSB_PHY_OTG_CTRL_ENABLE, tmp); in tusb_wbus_quirk()
110 musb_readl(tbase, TUSB_PHY_OTG_CTRL), in tusb_wbus_quirk()
111 musb_readl(tbase, TUSB_PHY_OTG_CTRL_ENABLE)); in tusb_wbus_quirk()
112 } else if (musb_readl(tbase, TUSB_PHY_OTG_CTRL_ENABLE) in tusb_wbus_quirk()
115 musb_writel(tbase, TUSB_PHY_OTG_CTRL, tmp); in tusb_wbus_quirk()
117 musb_writel(tbase, TUSB_PHY_OTG_CTRL_ENABLE, tmp); in tusb_wbus_quirk()
119 musb_readl(tbase, TUSB_PHY_OTG_CTRL), in tusb_wbus_quirk()
120 musb_readl(tbase, TUSB_PHY_OTG_CTRL_ENABLE)); in tusb_wbus_quirk()
328 void __iomem *tbase = musb->ctrl_base; in tusb_draw_power() local
344 reg = musb_readl(tbase, TUSB_PRCM_MNGMT); in tusb_draw_power()
352 musb_writel(tbase, TUSB_PRCM_MNGMT, reg); in tusb_draw_power()
364 void __iomem *tbase = musb->ctrl_base; in tusb_set_clock_source() local
367 reg = musb_readl(tbase, TUSB_PRCM_CONF); in tusb_set_clock_source()
378 musb_writel(tbase, TUSB_PRCM_CONF, reg); in tusb_set_clock_source()
391 void __iomem *tbase = musb->ctrl_base; in tusb_allow_idle() local
401 musb_writel(tbase, TUSB_PRCM_WAKEUP_MASK, ~wakeup_enables); in tusb_allow_idle()
408 reg = musb_readl(tbase, TUSB_PRCM_MNGMT); in tusb_allow_idle()
418 musb_writel(tbase, TUSB_PRCM_MNGMT, reg); in tusb_allow_idle()
428 void __iomem *tbase = musb->ctrl_base; in tusb_musb_vbus_status() local
432 otg_stat = musb_readl(tbase, TUSB_DEV_OTG_STAT); in tusb_musb_vbus_status()
433 prcm_mngmt = musb_readl(tbase, TUSB_PRCM_MNGMT); in tusb_musb_vbus_status()
442 musb_writel(tbase, TUSB_PRCM_MNGMT, tmp); in tusb_musb_vbus_status()
443 otg_stat = musb_readl(tbase, TUSB_DEV_OTG_STAT); in tusb_musb_vbus_status()
444 musb_writel(tbase, TUSB_PRCM_MNGMT, prcm_mngmt); in tusb_musb_vbus_status()
552 void __iomem *tbase = musb->ctrl_base; in tusb_musb_set_vbus() local
562 prcm = musb_readl(tbase, TUSB_PRCM_MNGMT); in tusb_musb_set_vbus()
563 conf = musb_readl(tbase, TUSB_DEV_CONF); in tusb_musb_set_vbus()
580 otg_stat = musb_readl(tbase, TUSB_DEV_OTG_STAT); in tusb_musb_set_vbus()
608 musb_writel(tbase, TUSB_PRCM_MNGMT, prcm); in tusb_musb_set_vbus()
609 musb_writel(tbase, TUSB_DEV_OTG_TIMER, timer); in tusb_musb_set_vbus()
610 musb_writel(tbase, TUSB_DEV_CONF, conf); in tusb_musb_set_vbus()
616 musb_readl(tbase, TUSB_DEV_OTG_STAT), in tusb_musb_set_vbus()
629 void __iomem *tbase = musb->ctrl_base; in tusb_musb_set_mode() local
632 otg_stat = musb_readl(tbase, TUSB_DEV_OTG_STAT); in tusb_musb_set_mode()
633 phy_otg_ctrl = musb_readl(tbase, TUSB_PHY_OTG_CTRL); in tusb_musb_set_mode()
634 phy_otg_ena = musb_readl(tbase, TUSB_PHY_OTG_CTRL_ENABLE); in tusb_musb_set_mode()
635 dev_conf = musb_readl(tbase, TUSB_DEV_CONF); in tusb_musb_set_mode()
661 musb_writel(tbase, TUSB_PHY_OTG_CTRL, in tusb_musb_set_mode()
663 musb_writel(tbase, TUSB_PHY_OTG_CTRL_ENABLE, in tusb_musb_set_mode()
665 musb_writel(tbase, TUSB_DEV_CONF, dev_conf); in tusb_musb_set_mode()
667 otg_stat = musb_readl(tbase, TUSB_DEV_OTG_STAT); in tusb_musb_set_mode()
677 tusb_otg_ints(struct musb *musb, u32 int_src, void __iomem *tbase) in tusb_otg_ints() argument
679 u32 otg_stat = musb_readl(tbase, TUSB_DEV_OTG_STAT); in tusb_otg_ints()
821 void __iomem *tbase = musb->ctrl_base; in tusb_musb_interrupt() local
828 int_mask = musb_readl(tbase, TUSB_INT_MASK); in tusb_musb_interrupt()
829 musb_writel(tbase, TUSB_INT_MASK, ~TUSB_INT_MASK_RESERVED_BITS); in tusb_musb_interrupt()
831 int_src = musb_readl(tbase, TUSB_INT_SRC) & ~TUSB_INT_SRC_RESERVED_BITS; in tusb_musb_interrupt()
848 musb_writel(tbase, TUSB_SCRATCH_PAD, 0); in tusb_musb_interrupt()
849 musb_writel(tbase, TUSB_SCRATCH_PAD, i); in tusb_musb_interrupt()
850 reg = musb_readl(tbase, TUSB_SCRATCH_PAD); in tusb_musb_interrupt()
859 reg = musb_readl(tbase, TUSB_PRCM_WAKEUP_SOURCE); in tusb_musb_interrupt()
860 musb_writel(tbase, TUSB_PRCM_WAKEUP_CLEAR, reg); in tusb_musb_interrupt()
878 idle_timeout = tusb_otg_ints(musb, int_src, tbase); in tusb_musb_interrupt()
885 u32 dma_src = musb_readl(tbase, TUSB_DMA_INT_SRC); in tusb_musb_interrupt()
888 musb_writel(tbase, TUSB_DMA_INT_CLEAR, dma_src); in tusb_musb_interrupt()
893 u32 musb_src = musb_readl(tbase, TUSB_USBIP_INT_SRC); in tusb_musb_interrupt()
895 musb_writel(tbase, TUSB_USBIP_INT_CLEAR, musb_src); in tusb_musb_interrupt()
907 musb_writel(tbase, TUSB_INT_SRC_CLEAR, in tusb_musb_interrupt()
912 musb_writel(tbase, TUSB_INT_MASK, int_mask); in tusb_musb_interrupt()
927 void __iomem *tbase = musb->ctrl_base; in tusb_musb_enable() local
931 musb_writel(tbase, TUSB_INT_MASK, TUSB_INT_SRC_USB_IP_SOF); in tusb_musb_enable()
934 musb_writel(tbase, TUSB_USBIP_INT_MASK, 0); in tusb_musb_enable()
935 musb_writel(tbase, TUSB_DMA_INT_MASK, 0x7fffffff); in tusb_musb_enable()
936 musb_writel(tbase, TUSB_GPIO_INT_MASK, 0x1ff); in tusb_musb_enable()
939 musb_writel(tbase, TUSB_USBIP_INT_CLEAR, 0x7fffffff); in tusb_musb_enable()
940 musb_writel(tbase, TUSB_DMA_INT_CLEAR, 0x7fffffff); in tusb_musb_enable()
941 musb_writel(tbase, TUSB_GPIO_INT_CLEAR, 0x1ff); in tusb_musb_enable()
944 musb_writel(tbase, TUSB_INT_SRC_CLEAR, ~TUSB_INT_MASK_RESERVED_BITS); in tusb_musb_enable()
948 musb_writel(tbase, TUSB_INT_CTRL_CONF, in tusb_musb_enable()
954 if (!(musb_readl(tbase, TUSB_DEV_OTG_STAT) in tusb_musb_enable()
956 musb_writel(tbase, TUSB_INT_SRC_SET, in tusb_musb_enable()
971 void __iomem *tbase = musb->ctrl_base; in tusb_musb_disable() local
976 musb_writel(tbase, TUSB_INT_MASK, ~TUSB_INT_MASK_RESERVED_BITS); in tusb_musb_disable()
977 musb_writel(tbase, TUSB_USBIP_INT_MASK, 0x7fffffff); in tusb_musb_disable()
978 musb_writel(tbase, TUSB_DMA_INT_MASK, 0x7fffffff); in tusb_musb_disable()
979 musb_writel(tbase, TUSB_GPIO_INT_MASK, 0x1ff); in tusb_musb_disable()
996 void __iomem *tbase = musb->ctrl_base; in tusb_setup_cpu_interface() local
1002 musb_writel(tbase, TUSB_PULLUP_1_CTRL, 0x0000003F); in tusb_setup_cpu_interface()
1005 musb_writel(tbase, TUSB_PULLUP_2_CTRL, 0x01FFFFFF); in tusb_setup_cpu_interface()
1008 musb_writel(tbase, TUSB_GPIO_CONF, TUSB_GPIO_CONF_DMAREQ(0x3f)); in tusb_setup_cpu_interface()
1012 musb_writel(tbase, TUSB_DMA_REQ_CONF, in tusb_setup_cpu_interface()
1018 musb_writel(tbase, TUSB_WAIT_COUNT, 1); in tusb_setup_cpu_interface()
1023 void __iomem *tbase = musb->ctrl_base; in tusb_musb_start() local
1037 if (musb_readl(tbase, TUSB_PROD_TEST_RESET) != in tusb_musb_start()
1053 musb_writel(tbase, TUSB_VLYNQ_CTRL, 8); in tusb_musb_start()
1061 musb_writel(tbase, TUSB_PRCM_MNGMT, in tusb_musb_start()
1070 reg = musb_readl(tbase, TUSB_PHY_OTG_CTRL_ENABLE); in tusb_musb_start()
1072 musb_writel(tbase, TUSB_PHY_OTG_CTRL_ENABLE, reg); in tusb_musb_start()
1074 reg = musb_readl(tbase, TUSB_PHY_OTG_CTRL); in tusb_musb_start()
1076 musb_writel(tbase, TUSB_PHY_OTG_CTRL, reg); in tusb_musb_start()