Lines Matching refs:dump_register
16 #define dump_register(nm) \ macro
29 dump_register(SSUSB_IP_PW_CTRL0),
30 dump_register(SSUSB_IP_PW_CTRL1),
31 dump_register(SSUSB_IP_PW_CTRL2),
32 dump_register(SSUSB_IP_PW_CTRL3),
33 dump_register(SSUSB_OTG_STS),
34 dump_register(SSUSB_IP_XHCI_CAP),
35 dump_register(SSUSB_IP_DEV_CAP),
36 dump_register(SSUSB_U3_CTRL_0P),
37 dump_register(SSUSB_U2_CTRL_0P),
38 dump_register(SSUSB_HW_ID),
39 dump_register(SSUSB_HW_SUB_ID),
40 dump_register(SSUSB_IP_SPARE0),
44 dump_register(LV1ISR),
45 dump_register(LV1IER),
46 dump_register(EPISR),
47 dump_register(EPIER),
48 dump_register(EP0CSR),
49 dump_register(RXCOUNT0),
50 dump_register(QISAR0),
51 dump_register(QIER0),
52 dump_register(QISAR1),
53 dump_register(QIER1),
54 dump_register(CAP_EPNTXFFSZ),
55 dump_register(CAP_EPNRXFFSZ),
56 dump_register(CAP_EPINFO),
57 dump_register(MISC_CTRL),
61 dump_register(DEVICE_CONF),
62 dump_register(DEV_LINK_INTR_ENABLE),
63 dump_register(DEV_LINK_INTR),
64 dump_register(LTSSM_CTRL),
65 dump_register(USB3_CONFIG),
66 dump_register(LINK_STATE_MACHINE),
67 dump_register(LTSSM_INTR_ENABLE),
68 dump_register(LTSSM_INTR),
69 dump_register(U3U2_SWITCH_CTRL),
70 dump_register(POWER_MANAGEMENT),
71 dump_register(DEVICE_CONTROL),
72 dump_register(COMMON_USB_INTR_ENABLE),
73 dump_register(COMMON_USB_INTR),
74 dump_register(USB20_MISC_CONTROL),
75 dump_register(USB20_OPSTATE),