Lines Matching full:ports
170 struct usb_hub_descriptor *desc, int ports) in xhci_common_hub_descriptor() argument
176 desc->bNbrPorts = ports; in xhci_common_hub_descriptor()
186 /* Bits 6:5 - no TTs in root ports */ in xhci_common_hub_descriptor()
195 int ports; in xhci_usb2_hub_descriptor() local
203 ports = rhub->num_ports; in xhci_usb2_hub_descriptor()
204 xhci_common_hub_descriptor(xhci, desc, ports); in xhci_usb2_hub_descriptor()
206 temp = 1 + (ports / 8); in xhci_usb2_hub_descriptor()
214 for (i = 0; i < ports; i++) { in xhci_usb2_hub_descriptor()
215 portsc = readl(rhub->ports[i]->addr); in xhci_usb2_hub_descriptor()
227 * ports on it. The USB 2.0 specification says that there are two in xhci_usb2_hub_descriptor()
230 * USB_MAXCHILDREN ports, we may need to use the DeviceRemovable array in xhci_usb2_hub_descriptor()
234 * set of ports that actually exist. in xhci_usb2_hub_descriptor()
241 for (i = 0; i < (ports + 1 + 7) / 8; i++) in xhci_usb2_hub_descriptor()
250 int ports; in xhci_usb3_hub_descriptor() local
257 ports = rhub->num_ports; in xhci_usb3_hub_descriptor()
258 xhci_common_hub_descriptor(xhci, desc, ports); in xhci_usb3_hub_descriptor()
271 for (i = 0; i < ports; i++) { in xhci_usb3_hub_descriptor()
272 portsc = readl(rhub->ports[i]->addr); in xhci_usb3_hub_descriptor()
328 * change bits: connect, PED, warm port reset changed (reserved zero for USB 2.0 ports),
489 /* Don't allow the USB core to disable SuperSpeed ports. */ in xhci_disable_port()
583 port = rhub->ports[index]; in xhci_set_port_power()
615 /* xhci only supports test mode for usb2 ports */ in xhci_port_set_test_mode()
616 port = xhci->usb2_rhub.ports[wIndex]; in xhci_port_set_test_mode()
645 /* Put all ports to the Disable state by clear PP */ in xhci_enter_test_mode()
647 /* Power off USB3 ports*/ in xhci_enter_test_mode()
650 /* Power off USB2 ports*/ in xhci_enter_test_mode()
801 * This Function verifies if all xhc USB3 ports have entered U0, if so,
819 "All USB3 ports have entered U0 already!"); in xhci_del_comp_mod_timer()
1051 port = rhub->ports[wIndex]; in xhci_get_port_status()
1115 struct xhci_port **ports; in xhci_hub_control() local
1118 ports = rhub->ports; in xhci_hub_control()
1157 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1182 port_li = readl(ports[wIndex]->addr + PORTLI); in xhci_hub_control()
1200 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1210 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1213 xhci_set_link_state(xhci, ports[wIndex], in xhci_hub_control()
1223 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1242 xhci_set_link_state(xhci, ports[wIndex], XDEV_U3); in xhci_hub_control()
1248 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1252 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1265 writel(temp | PORT_PE, ports[wIndex]->addr); in xhci_hub_control()
1266 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1274 xhci_set_link_state(xhci, ports[wIndex], in xhci_hub_control()
1276 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1307 xhci_set_link_state(xhci, ports[wIndex], in xhci_hub_control()
1310 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1347 xhci_set_link_state(xhci, ports[wIndex], in xhci_hub_control()
1360 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1376 xhci_set_link_state(xhci, ports[wIndex], USB_SS_PORT_LS_U3); in xhci_hub_control()
1380 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1385 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1391 * Turn on ports, even if there isn't per-port switching. in xhci_hub_control()
1400 writel(temp, ports[wIndex]->addr); in xhci_hub_control()
1402 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1407 xhci_set_remote_wake_mask(xhci, ports[wIndex], in xhci_hub_control()
1409 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1415 writel(temp, ports[wIndex]->addr); in xhci_hub_control()
1416 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1421 temp = readl(ports[wIndex]->addr + PORTPMSC); in xhci_hub_control()
1424 writel(temp, ports[wIndex]->addr + PORTPMSC); in xhci_hub_control()
1429 temp = readl(ports[wIndex]->addr + PORTPMSC); in xhci_hub_control()
1432 writel(temp, ports[wIndex]->addr + PORTPMSC); in xhci_hub_control()
1448 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1454 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1464 temp = readl(ports[wIndex]->addr); in xhci_hub_control()
1475 xhci_set_link_state(xhci, ports[wIndex], in xhci_hub_control()
1480 xhci_set_link_state(xhci, ports[wIndex], in xhci_hub_control()
1506 ports[wIndex]->addr, temp); in xhci_hub_control()
1510 ports[wIndex]->addr, temp); in xhci_hub_control()
1533 * Ports are 0-indexed from the HCD point of view,
1550 struct xhci_port **ports; in xhci_hub_status_data() local
1553 ports = rhub->ports; in xhci_hub_status_data()
1573 temp = readl(ports[i]->addr); in xhci_hub_status_data()
1611 struct xhci_port **ports; in xhci_bus_suspend() local
1616 ports = rhub->ports; in xhci_bus_suspend()
1633 * Prepare ports for suspend, but don't write anything before all ports in xhci_bus_suspend()
1642 t1 = readl(ports[port_index]->addr); in xhci_bus_suspend()
1666 /* suspend ports in U0, or bail out for new connect changes */ in xhci_bus_suspend()
1721 /* write port settings, stopping and suspending ports if needed */ in xhci_bus_suspend()
1737 writel(portsc_buf[port_index], ports[port_index]->addr); in xhci_bus_suspend()
1789 struct xhci_port **ports; in xhci_bus_resume() local
1792 ports = rhub->ports; in xhci_bus_resume()
1810 /* bus specific resume for ports we suspended at bus_suspend */ in xhci_bus_resume()
1818 portsc = readl(ports[port_index]->addr); in xhci_bus_resume()
1820 /* warm reset CAS limited ports stuck in polling/compliance */ in xhci_bus_resume()
1823 xhci_port_missing_cas_quirk(ports[port_index])) { in xhci_bus_resume()
1846 /* disable wake for all ports, write new link state if needed */ in xhci_bus_resume()
1848 writel(portsc, ports[port_index]->addr); in xhci_bus_resume()
1861 xhci_test_and_clear_bit(xhci, ports[port_index], in xhci_bus_resume()
1863 xhci_set_link_state(xhci, ports[port_index], XDEV_U0); in xhci_bus_resume()
1869 sret = xhci_handshake(ports[port_index]->addr, PORT_PLC, in xhci_bus_resume()
1876 xhci_test_and_clear_bit(xhci, ports[port_index], PORT_PLC); in xhci_bus_resume()
1900 return rhub->bus_state.resuming_ports; /* USB2 ports only */ in xhci_get_resuming_ports()