166 	int etd_mask = (1 << num);  in disactivate_etd()  local
169 	writel(etd_mask, imx21->regs + USBH_ETDENCLR);  in disactivate_etd()
170 	clear_register_bits(imx21, USBH_ETDDONEEN, etd_mask);  in disactivate_etd()
171 	writel(etd_mask, imx21->regs + USB_ETDDMACHANLCLR);  in disactivate_etd()
172 	clear_toggle_bit(imx21, USBH_ETDDONESTAT, etd_mask);  in disactivate_etd()
256 	u32 etd_mask = 1 << etd_num;  in activate_etd()  local
301 	clear_toggle_bit(imx21, USBH_ETDDONESTAT, etd_mask);  in activate_etd()
302 	set_register_bits(imx21, USBH_ETDDONEEN, etd_mask);  in activate_etd()
303 	clear_toggle_bit(imx21, USBH_XFILLSTAT, etd_mask);  in activate_etd()
304 	clear_toggle_bit(imx21, USBH_YFILLSTAT, etd_mask);  in activate_etd()
307 		set_register_bits(imx21, USB_ETDDMACHANLCLR, etd_mask);  in activate_etd()
308 		clear_toggle_bit(imx21, USBH_XBUFSTAT, etd_mask);  in activate_etd()
309 		clear_toggle_bit(imx21, USBH_YBUFSTAT, etd_mask);  in activate_etd()
311 		set_register_bits(imx21, USB_ETDDMAEN, etd_mask);  in activate_etd()
315 			set_toggle_bit(imx21, USBH_XFILLSTAT, etd_mask);  in activate_etd()
316 			set_toggle_bit(imx21, USBH_YFILLSTAT, etd_mask);  in activate_etd()
336 	writel(etd_mask, imx21->regs + USBH_ETDENSET);  in activate_etd()
621 	int etd_mask = 1 << etd_num;  in isoc_etd_done()  local
659 		clear_toggle_bit(imx21, USBH_XFILLSTAT, etd_mask);  in isoc_etd_done()
1035 	u32 etd_mask = 1 << etd_num;  in nonisoc_etd_done()  local
1054 		clear_toggle_bit(imx21, USBH_XFILLSTAT, etd_mask);  in nonisoc_etd_done()
1055 		clear_toggle_bit(imx21, USBH_YFILLSTAT, etd_mask);  in nonisoc_etd_done()
1309 		u32 etd_mask = 1 << etd_num;  in process_etds()  local
1310 		u32 enabled = readl(imx21->regs + USBH_ETDENSET) & etd_mask;  in process_etds()
1311 		u32 done = readl(imx21->regs + USBH_ETDDONESTAT) & etd_mask;  in process_etds()