57 	m66592_bset(m66592, (1 << pipenum), reg);  in enable_pipe_irq()
75 	m66592_bset(m66592, M66592_CTRE, M66592_INTENB0);  in m66592_usb_connect()
76 	m66592_bset(m66592, M66592_WDST | M66592_RDST | M66592_CMPL,  in m66592_usb_connect()
78 	m66592_bset(m66592, M66592_BEMPE | M66592_BRDYE, M66592_INTENB0);  in m66592_usb_connect()
80 	m66592_bset(m66592, M66592_DPRPU, M66592_SYSCFG);  in m66592_usb_connect()
170 		m66592_bset(m66592, M66592_SQCLR, M66592_DCPCTR);  in control_reg_sqclr()
173 		m66592_bset(m66592, M66592_SQCLR, offset);  in control_reg_sqclr()
223 	m66592_bset(m66592, mbw, ep->fifosel);  in pipe_change()
320 		m66592_bset(m66592, mbw, ep->fifosel);  in pipe_initialize()
491 	m66592_bset(m66592, M66592_CCPL, M66592_DCPCTR);  in control_end()
504 		m66592_bset(m66592, M66592_BVAL, ep->fifoctr);  in start_ep0_write()
543 			m66592_bset(m66592, M66592_TRCLR, ep->fifosel);  in start_packet_read()
545 			m66592_bset(m66592, M66592_TRENB, ep->fifosel);  in start_packet_read()
597 		m66592_bset(m66592, M66592_HSE, M66592_SYSCFG);	/* High spd */  in init_controller()
600 		m66592_bset(m66592, M66592_USBE, M66592_SYSCFG);  in init_controller()
603 		m66592_bset(m66592, 0x8000, M66592_DVSTCTR);  in init_controller()
604 		m66592_bset(m66592, 0x1000, M66592_TESTMODE);  in init_controller()
607 		m66592_bset(m66592, M66592_INTL, M66592_INTENB1);  in init_controller()
611 		m66592_bset(m66592, endian, M66592_CFBCFG);  in init_controller()
612 		m66592_bset(m66592, endian, M66592_D0FBCFG);  in init_controller()
653 		m66592_bset(m66592,  in init_controller()
656 		m66592_bset(m66592, M66592_HSE, M66592_SYSCFG);	/* High spd */  in init_controller()
661 		m66592_bset(m66592, M66592_USBE, M66592_SYSCFG);  in init_controller()
663 		m66592_bset(m66592, M66592_XCKE, M66592_SYSCFG);  in init_controller()
667 		m66592_bset(m66592, M66592_RCKE | M66592_PLLC, M66592_SYSCFG);  in init_controller()
671 		m66592_bset(m66592, M66592_SCKE, M66592_SYSCFG);  in init_controller()
673 		m66592_bset(m66592, irq_sense & M66592_INTL, M66592_INTENB1);  in init_controller()
700 			m66592_bset(m66592, M66592_XCKE, M66592_SYSCFG);  in m66592_start_xclock()
750 	m66592_bset(m66592, M66592_ISEL, ep->fifosel);  in irq_ep0_write()
773 			m66592_bset(m66592, M66592_BVAL, ep->fifoctr);  in irq_ep0_write()
822 			m66592_bset(m66592, M66592_BVAL, ep->fifoctr);  in irq_packet_write()
1055 				m66592_bset(m66592,  in set_feature()
1271 		m66592_bset(m66592, M66592_RCKE | M66592_PLLC, M66592_SYSCFG);  in m66592_timer()
1273 		m66592_bset(m66592, M66592_SCKE, M66592_SYSCFG);  in m66592_timer()
1460 	m66592_bset(m66592, M66592_VBSE | M66592_URST, M66592_INTENB0);  in m66592_udc_start()
1501 		m66592_bset(m66592, M66592_DPRPU, M66592_SYSCFG);  in m66592_pullup()