Lines Matching +full:designware +full:- +full:pcie

1 # SPDX-License-Identifier: GPL-2.0
4 	tristate "DesignWare USB3 DRD Core Support"
10 	  USB controller based on the DesignWare USB3 IP Core.
73 	  Recent Exynos5 SoCs ship with one DesignWare Core USB3 IP inside,
77 	tristate "PCIe-based Platforms"
81 	  If you're using the DesignWare Core IP with a PCIe (but not HAPS
85 	tristate "Synopsys PCIe-based HAPS Platforms"
89 	  If you're using the DesignWare Core IP with a Synopsys PCIe HAPS
125 	  STMicroelectronics SoCs with one DesignWare Core USB3 IP
136 	  Some Qualcomm SoCs use DesignWare Core IP for USB2/3
148 	  NXP iMX8M Plus SoC use DesignWare Core IP for USB2/3