420 	dev_vdbg(hsotg->dev, "%s(%p,%p,%d)\n", __func__, hsotg, dest, bytes);  in dwc2_read_packet()
538 		dev_vdbg(hsotg->dev, "control/bulk\n");  in dwc2_hc_enable_slave_ints()
566 			dev_vdbg(hsotg->dev, "intr\n");  in dwc2_hc_enable_slave_ints()
588 			dev_vdbg(hsotg->dev, "isoc\n");  in dwc2_hc_enable_slave_ints()
605 		dev_vdbg(hsotg->dev, "set HCINTMSK to %08x\n", hcintmsk);  in dwc2_hc_enable_slave_ints()
619 			dev_vdbg(hsotg->dev, "desc DMA disabled\n");  in dwc2_hc_enable_dma_ints()
623 			dev_vdbg(hsotg->dev, "desc DMA enabled\n");  in dwc2_hc_enable_dma_ints()
631 			dev_vdbg(hsotg->dev, "setting ACK\n");  in dwc2_hc_enable_dma_ints()
642 		dev_vdbg(hsotg->dev, "set HCINTMSK to %08x\n", hcintmsk);  in dwc2_hc_enable_dma_ints()
652 			dev_vdbg(hsotg->dev, "DMA enabled\n");  in dwc2_hc_enable_ints()
656 			dev_vdbg(hsotg->dev, "DMA disabled\n");  in dwc2_hc_enable_ints()
665 		dev_vdbg(hsotg->dev, "set HAINTMSK to %08x\n", intmsk);  in dwc2_hc_enable_ints()
672 		dev_vdbg(hsotg->dev, "set GINTMSK to %08x\n", intmsk);  in dwc2_hc_enable_ints()
694 		dev_vdbg(hsotg->dev, "%s()\n", __func__);  in dwc2_hc_init()
718 		dev_vdbg(hsotg->dev, "set HCCHAR(%d) to %08x\n",  in dwc2_hc_init()
721 		dev_vdbg(hsotg->dev, "%s: Channel %d\n",  in dwc2_hc_init()
723 		dev_vdbg(hsotg->dev, "	 Dev Addr: %d\n",  in dwc2_hc_init()
725 		dev_vdbg(hsotg->dev, "	 Ep Num: %d\n",  in dwc2_hc_init()
727 		dev_vdbg(hsotg->dev, "	 Is In: %d\n",  in dwc2_hc_init()
729 		dev_vdbg(hsotg->dev, "	 Is Low Speed: %d\n",  in dwc2_hc_init()
731 		dev_vdbg(hsotg->dev, "	 Ep Type: %d\n",  in dwc2_hc_init()
733 		dev_vdbg(hsotg->dev, "	 Max Pkt: %d\n",  in dwc2_hc_init()
740 			dev_vdbg(hsotg->dev,  in dwc2_hc_init()
753 			dev_vdbg(hsotg->dev, "	  comp split %d\n",  in dwc2_hc_init()
755 			dev_vdbg(hsotg->dev, "	  xact pos %d\n",  in dwc2_hc_init()
757 			dev_vdbg(hsotg->dev, "	  hub addr %d\n",  in dwc2_hc_init()
759 			dev_vdbg(hsotg->dev, "	  hub port %d\n",  in dwc2_hc_init()
761 			dev_vdbg(hsotg->dev, "	  is_in %d\n",  in dwc2_hc_init()
763 			dev_vdbg(hsotg->dev, "	  Max Pkt %d\n",  in dwc2_hc_init()
765 			dev_vdbg(hsotg->dev, "	  xferlen %d\n",  in dwc2_hc_init()
807 		dev_vdbg(hsotg->dev, "%s()\n", __func__);  in dwc2_hc_halt()
841 		dev_vdbg(hsotg->dev, "dequeue/error\n");  in dwc2_hc_halt()
880 		dev_vdbg(hsotg->dev,  in dwc2_hc_halt()
892 			dev_vdbg(hsotg->dev, "desc DMA disabled\n");  in dwc2_hc_halt()
902 			dev_vdbg(hsotg->dev, "DMA not enabled\n");  in dwc2_hc_halt()
908 			dev_vdbg(hsotg->dev, "control/bulk\n");  in dwc2_hc_halt()
911 				dev_vdbg(hsotg->dev, "Disabling channel\n");  in dwc2_hc_halt()
916 				dev_vdbg(hsotg->dev, "isoc/intr\n");  in dwc2_hc_halt()
921 					dev_vdbg(hsotg->dev, "Disabling channel\n");  in dwc2_hc_halt()
927 			dev_vdbg(hsotg->dev, "DMA enabled\n");  in dwc2_hc_halt()
935 			dev_vdbg(hsotg->dev, "Channel enabled\n");  in dwc2_hc_halt()
940 			dev_vdbg(hsotg->dev, "Channel disabled\n");  in dwc2_hc_halt()
945 		dev_vdbg(hsotg->dev, "%s: Channel %d\n", __func__,  in dwc2_hc_halt()
947 		dev_vdbg(hsotg->dev, "	 hcchar: 0x%08x\n",  in dwc2_hc_halt()
949 		dev_vdbg(hsotg->dev, "	 halt_pending: %d\n",  in dwc2_hc_halt()
951 		dev_vdbg(hsotg->dev, "	 halt_on_queue: %d\n",  in dwc2_hc_halt()
953 		dev_vdbg(hsotg->dev, "	 halt_status: %d\n",  in dwc2_hc_halt()
1140 		dev_vdbg(hsotg->dev, "%s()\n", __func__);  in dwc2_hc_write_packet()
1183 		dev_vdbg(hsotg->dev, "%s: Channel %d\n", __func__,  in dwc2_hc_do_ping()
1240 		dev_vdbg(hsotg->dev, "%s()\n", __func__);  in dwc2_hc_start_transfer()
1245 				dev_vdbg(hsotg->dev, "ping, no DMA\n");  in dwc2_hc_start_transfer()
1252 			dev_vdbg(hsotg->dev, "ping, DMA\n");  in dwc2_hc_start_transfer()
1259 			dev_vdbg(hsotg->dev, "split\n");  in dwc2_hc_start_transfer()
1284 			dev_vdbg(hsotg->dev, "no split\n");  in dwc2_hc_start_transfer()
1356 		dev_vdbg(hsotg->dev, "Wrote %08x to HCTSIZ(%d)\n",  in dwc2_hc_start_transfer()
1359 		dev_vdbg(hsotg->dev, "%s: Channel %d\n", __func__,  in dwc2_hc_start_transfer()
1361 		dev_vdbg(hsotg->dev, "	 Xfer Size: %d\n",  in dwc2_hc_start_transfer()
1364 		dev_vdbg(hsotg->dev, "	 Num Pkts: %d\n",  in dwc2_hc_start_transfer()
1367 		dev_vdbg(hsotg->dev, "	 Start PID: %d\n",  in dwc2_hc_start_transfer()
1377 				dev_vdbg(hsotg->dev, "align_buf\n");  in dwc2_hc_start_transfer()
1385 			dev_vdbg(hsotg->dev, "Wrote %08lx to HCDMA(%d)\n",  in dwc2_hc_start_transfer()
1412 		dev_vdbg(hsotg->dev, "	 Multi Cnt: %d\n",  in dwc2_hc_start_transfer()
1418 		dev_vdbg(hsotg->dev, "Wrote %08x to HCCHAR(%d)\n", hcchar,  in dwc2_hc_start_transfer()
1467 		dev_vdbg(hsotg->dev, "%s: Channel %d\n", __func__,  in dwc2_hc_start_transfer_ddma()
1469 		dev_vdbg(hsotg->dev, "	 Start PID: %d\n",  in dwc2_hc_start_transfer_ddma()
1471 		dev_vdbg(hsotg->dev, "	 NTD: %d\n", chan->ntd - 1);  in dwc2_hc_start_transfer_ddma()
1482 		dev_vdbg(hsotg->dev, "Wrote %pad to HCDMA(%d)\n",  in dwc2_hc_start_transfer_ddma()
1500 		dev_vdbg(hsotg->dev, "	 Multi Cnt: %d\n",  in dwc2_hc_start_transfer_ddma()
1506 		dev_vdbg(hsotg->dev, "Wrote %08x to HCCHAR(%d)\n", hcchar,  in dwc2_hc_start_transfer_ddma()
1537 		dev_vdbg(hsotg->dev, "%s: Channel %d\n", __func__,  in dwc2_hc_continue_transfer()
1567 			dev_vdbg(hsotg->dev, "	 IN xfer: hcchar = 0x%08x\n",  in dwc2_hc_continue_transfer()
2371 			dev_vdbg(hsotg->dev, "  Control setup transaction\n");  in dwc2_hc_init_xfer()
2383 			dev_vdbg(hsotg->dev, "  Control data transaction\n");  in dwc2_hc_init_xfer()
2392 			dev_vdbg(hsotg->dev, "  Control status transaction\n");  in dwc2_hc_init_xfer()
2605 		dev_vdbg(hsotg->dev, "%s(%p,%p)\n", __func__, hsotg, qh);  in dwc2_assign_and_init_hc()
2684 		dev_vdbg(hsotg->dev, "Non-aligned buffer\n");  in dwc2_assign_and_init_hc()
2744 	dev_vdbg(hsotg->dev, "  Select Transactions\n");  in dwc2_hcd_select_transactions()
2915 		dev_vdbg(hsotg->dev, "Queue periodic transactions\n");  in dwc2_process_periodic_channels()
2924 		dev_vdbg(hsotg->dev, "  P Tx Req Queue Space Avail (before queue): %d\n",  in dwc2_process_periodic_channels()
2926 		dev_vdbg(hsotg->dev, "  P Tx FIFO Space Avail (before queue): %d\n",  in dwc2_process_periodic_channels()
3045 	dev_vdbg(hsotg->dev, "Queue non-periodic transactions\n");  in dwc2_process_non_periodic_channels()
3052 	dev_vdbg(hsotg->dev, "  NP Tx Req Queue Space Avail (before queue): %d\n",  in dwc2_process_non_periodic_channels()
3054 	dev_vdbg(hsotg->dev, "  NP Tx FIFO Space Avail (before queue): %d\n",  in dwc2_process_non_periodic_channels()
3112 		dev_vdbg(hsotg->dev,  in dwc2_process_non_periodic_channels()
3115 		dev_vdbg(hsotg->dev,  in dwc2_process_non_periodic_channels()
3160 	dev_vdbg(hsotg->dev, "Queue Transactions\n");  in dwc2_hcd_queue_transactions()
3541 		dev_vdbg(hsotg->dev,  in dwc2_hcd_hub_control()
3576 		dev_vdbg(hsotg->dev, "  HPRT0: 0x%08x\n", hprt0);  in dwc2_hcd_hub_control()
3623 		dev_vdbg(hsotg->dev, "port_status=%08x\n", port_status);  in dwc2_hcd_hub_control()
3782 	dev_vdbg(hsotg->dev, "DWC OTG HCD GET FRAME NUMBER %d\n",  in dwc2_hcd_get_frame_number()
3842 		dev_vdbg(hsotg->dev,  in dwc2_hcd_urb_set_pipeinfo()
4142 		dev_vdbg(hsotg->dev,  in dwc2_host_complete()
4162 			dev_vdbg(hsotg->dev, " ISO Desc %d status %d\n",  in dwc2_host_complete()
4502 	dev_vdbg(hsotg->dev, "%s, urb %p\n", fn_name, urb);  in dwc2_dump_urb_info()
4503 	dev_vdbg(hsotg->dev, "  Device address: %d\n",  in dwc2_dump_urb_info()
4505 	dev_vdbg(hsotg->dev, "  Endpoint: %d, %s\n",  in dwc2_dump_urb_info()
4524 	dev_vdbg(hsotg->dev, "  Endpoint type: %s %s (%s)\n", pipetype,  in dwc2_dump_urb_info()
4543 	dev_vdbg(hsotg->dev, "  Speed: %s\n", speed);  in dwc2_dump_urb_info()
4544 	dev_vdbg(hsotg->dev, "  Max packet size: %d (%d mult)\n",  in dwc2_dump_urb_info()
4548 	dev_vdbg(hsotg->dev, "  Data buffer length: %d\n",  in dwc2_dump_urb_info()
4550 	dev_vdbg(hsotg->dev, "  Transfer buffer: %p, Transfer DMA: %08lx\n",  in dwc2_dump_urb_info()
4552 	dev_vdbg(hsotg->dev, "  Setup buffer: %p, Setup DMA: %08lx\n",  in dwc2_dump_urb_info()
4554 	dev_vdbg(hsotg->dev, "  Interval: %d\n", urb->interval);  in dwc2_dump_urb_info()
4560 			dev_vdbg(hsotg->dev, "  ISO Desc %d:\n", i);  in dwc2_dump_urb_info()
4561 			dev_vdbg(hsotg->dev, "    offset: %d, length %d\n",  in dwc2_dump_urb_info()
4592 		dev_vdbg(hsotg->dev, "DWC OTG HCD URB Enqueue\n");  in _dwc2_hcd_urb_enqueue()