Lines Matching refs:TCR
368 #define TCR 0x82 /* tx control */ macro
1330 value = rd_reg16(info, TCR); in set_break()
1335 wr_reg16(info, TCR, value); in set_break()
2212 unsigned short val = rd_reg16(info, TCR); in isr_txeom()
2213 wr_reg16(info, TCR, (unsigned short)(val | BIT2)); /* set reset bit */ in isr_txeom()
2214 wr_reg16(info, TCR, val); /* clear reset bit */ in isr_txeom()
2797 val = rd_reg16(info, TCR); in set_interface()
2802 wr_reg16(info, TCR, val); in set_interface()
3958 wr_reg16(info, TCR, in tx_start()
3959 (unsigned short)((rd_reg16(info, TCR) | BIT1) & ~BIT2)); in tx_start()
4002 val = rd_reg16(info, TCR) & ~BIT1; /* clear enable bit */ in tx_stop()
4003 wr_reg16(info, TCR, (unsigned short)(val | BIT2)); /* set reset bit */ in tx_stop()
4089 wr_reg16(info, TCR, val); in async_mode()
4251 wr_reg16(info, TCR, val); in sync_mode()
4413 tcr = rd_reg16(info, TCR); in tx_set_idle()
4423 wr_reg16(info, TCR, tcr); in tx_set_idle()
4912 wr_reg16(info, TCR, in irq_test()
4913 (unsigned short)(rd_reg16(info, TCR) | BIT1)); in irq_test()