103 	struct uart_port			uport;  member
155 	return readl(tup->uport.membase + (reg << tup->uport.regshift));  in tegra_uart_read()
161 	writel(val, tup->uport.membase + (reg << tup->uport.regshift));  in tegra_uart_write()
166 	return container_of(u, struct tegra_uart_port, uport);  in to_tegra_uport()
368 		dev_err(tup->uport.dev,  in tegra_check_rate_in_range()
396 			dev_err(tup->uport.dev,  in tegra_set_baudrate()
410 	spin_lock_irqsave(&tup->uport.lock, flags);  in tegra_set_baudrate()
423 	spin_unlock_irqrestore(&tup->uport.lock, flags);  in tegra_set_baudrate()
441 			tup->uport.icount.overrun++;  in tegra_uart_decode_rx_error()
442 			dev_dbg(tup->uport.dev, "Got overrun errors\n");  in tegra_uart_decode_rx_error()
446 			tup->uport.icount.parity++;  in tegra_uart_decode_rx_error()
447 			dev_dbg(tup->uport.dev, "Got Parity errors\n");  in tegra_uart_decode_rx_error()
450 			tup->uport.icount.frame++;  in tegra_uart_decode_rx_error()
451 			dev_dbg(tup->uport.dev, "Got frame errors\n");  in tegra_uart_decode_rx_error()
459 			if (tup->uport.ignore_status_mask & UART_LSR_BI)  in tegra_uart_decode_rx_error()
462 			tup->uport.icount.brk++;  in tegra_uart_decode_rx_error()
463 			dev_dbg(tup->uport.dev, "Got Break\n");  in tegra_uart_decode_rx_error()
465 		uart_insert_char(&tup->uport, lsr, UART_LSR_OE, 0, flag);  in tegra_uart_decode_rx_error()
483 	struct circ_buf *xmit = &tup->uport.state->xmit;  in tegra_uart_fill_tx_fifo()
495 		tup->uport.icount.tx++;  in tegra_uart_fill_tx_fifo()
514 	struct circ_buf *xmit = &tup->uport.state->xmit;  in tegra_uart_tx_dma_complete()
522 	spin_lock_irqsave(&tup->uport.lock, flags);  in tegra_uart_tx_dma_complete()
523 	uart_xmit_advance(&tup->uport, count);  in tegra_uart_tx_dma_complete()
526 		uart_write_wakeup(&tup->uport);  in tegra_uart_tx_dma_complete()
528 	spin_unlock_irqrestore(&tup->uport.lock, flags);  in tegra_uart_tx_dma_complete()
534 	struct circ_buf *xmit = &tup->uport.state->xmit;  in tegra_uart_start_tx_dma()
540 	dma_sync_single_for_device(tup->uport.dev, tx_phys_addr,  in tegra_uart_start_tx_dma()
547 		dev_err(tup->uport.dev, "Not able to get desc for Tx\n");  in tegra_uart_start_tx_dma()
564 	struct circ_buf *xmit = &tup->uport.state->xmit;  in tegra_uart_start_next_tx()
621 	uart_xmit_advance(&tup->uport, count);  in tegra_uart_stop_tx()
627 	struct circ_buf *xmit = &tup->uport.state->xmit;  in tegra_uart_handle_tx_pio()
632 		uart_write_wakeup(&tup->uport);  in tegra_uart_handle_tx_pio()
653 		tup->uport.icount.rx++;  in tegra_uart_handle_rx_pio()
655 		if (uart_handle_sysrq_char(&tup->uport, ch))  in tegra_uart_handle_rx_pio()
658 		if (tup->uport.ignore_status_mask & UART_LSR_DR)  in tegra_uart_handle_rx_pio()
675 	tup->uport.icount.rx += count;  in tegra_uart_copy_rx_to_tty()
677 	if (tup->uport.ignore_status_mask & UART_LSR_DR)  in tegra_uart_copy_rx_to_tty()
680 	dma_sync_single_for_cpu(tup->uport.dev, tup->rx_dma_buf_phys,  in tegra_uart_copy_rx_to_tty()
686 		dev_err(tup->uport.dev, "RxData copy to tty layer failed\n");  in tegra_uart_copy_rx_to_tty()
688 	dma_sync_single_for_device(tup->uport.dev, tup->rx_dma_buf_phys,  in tegra_uart_copy_rx_to_tty()
694 	struct tty_struct *tty = tty_port_tty_get(&tup->uport.state->port);  in do_handle_rx_pio()
695 	struct tty_port *port = &tup->uport.state->port;  in do_handle_rx_pio()
707 	struct tty_port *port = &tup->uport.state->port;  in tegra_uart_rx_buffer_push()
722 	struct uart_port *u = &tup->uport;  in tegra_uart_rx_dma_complete()
732 		dev_dbg(tup->uport.dev, "RX DMA is in progress\n");  in tegra_uart_rx_dma_complete()
791 		dev_err(tup->uport.dev, "Not able to get desc for Rx\n");  in tegra_uart_start_rx_dma()
814 		tup->uport.icount.rng++;  in tegra_uart_handle_modem_signal_change()
816 		tup->uport.icount.dsr++;  in tegra_uart_handle_modem_signal_change()
819 		uart_handle_dcd_change(&tup->uport, msr & UART_MSR_DCD);  in tegra_uart_handle_modem_signal_change()
822 		uart_handle_cts_change(&tup->uport, msr & UART_MSR_CTS);  in tegra_uart_handle_modem_signal_change()
828 	struct uart_port *u = &tup->uport;  in tegra_uart_isr()
905 	struct tty_port *port = &tup->uport.state->port;  in tegra_uart_stop_rx()
933 	unsigned long fifo_empty_time = tup->uport.fifosize * char_time;  in tegra_uart_hw_deinit()
947 			dev_err(tup->uport.dev,  in tegra_uart_hw_deinit()
960 					dev_err(tup->uport.dev,  in tegra_uart_hw_deinit()
968 	spin_lock_irqsave(&tup->uport.lock, flags);  in tegra_uart_hw_deinit()
972 	spin_unlock_irqrestore(&tup->uport.lock, flags);  in tegra_uart_hw_deinit()
1043 			dev_err(tup->uport.dev,  in tegra_uart_hw_init()
1064 		dev_err(tup->uport.dev, "Failed to set baud rate\n");  in tegra_uart_hw_init()
1109 		dma_free_coherent(tup->uport.dev, TEGRA_UART_RX_DMA_BUFFER_SIZE,  in tegra_uart_dma_channel_free()
1117 		dma_unmap_single(tup->uport.dev, tup->tx_dma_buf_phys,  in tegra_uart_dma_channel_free()
1134 	dma_chan = dma_request_chan(tup->uport.dev, dma_to_memory ? "rx" : "tx");  in tegra_uart_dma_channel_allocate()
1137 		dev_err(tup->uport.dev,  in tegra_uart_dma_channel_allocate()
1143 		dma_buf = dma_alloc_coherent(tup->uport.dev,  in tegra_uart_dma_channel_allocate()
1147 			dev_err(tup->uport.dev,  in tegra_uart_dma_channel_allocate()
1152 		dma_sync_single_for_device(tup->uport.dev, dma_phys,  in tegra_uart_dma_channel_allocate()
1155 		dma_sconfig.src_addr = tup->uport.mapbase;  in tegra_uart_dma_channel_allocate()
1162 		dma_phys = dma_map_single(tup->uport.dev,  in tegra_uart_dma_channel_allocate()
1163 			tup->uport.state->xmit.buf, UART_XMIT_SIZE,  in tegra_uart_dma_channel_allocate()
1165 		if (dma_mapping_error(tup->uport.dev, dma_phys)) {  in tegra_uart_dma_channel_allocate()
1166 			dev_err(tup->uport.dev, "dma_map_single tx failed\n");  in tegra_uart_dma_channel_allocate()
1170 		dma_buf = tup->uport.state->xmit.buf;  in tegra_uart_dma_channel_allocate()
1171 		dma_sconfig.dst_addr = tup->uport.mapbase;  in tegra_uart_dma_channel_allocate()
1181 		dev_err(tup->uport.dev,  in tegra_uart_dma_channel_allocate()
1353 		dev_err(tup->uport.dev, "Failed to set baud rate\n");  in tegra_uart_set_termios()
1384 	tup->uport.ignore_status_mask = 0;  in tegra_uart_set_termios()
1387 		tup->uport.ignore_status_mask |= UART_LSR_DR;  in tegra_uart_set_termios()
1389 		tup->uport.ignore_status_mask |= UART_LSR_BI;  in tegra_uart_set_termios()
1441 	tup->uport.line = port;  in tegra_uart_parse_dt()
1584 	u = &tup->uport;  in tegra_uart_probe()
1632 	struct uart_port *u = &tup->uport;  in tegra_uart_remove()
1642 	struct uart_port *u = &tup->uport;  in tegra_uart_suspend()
1650 	struct uart_port *u = &tup->uport;  in tegra_uart_resume()