Lines Matching refs:sport
314 static inline bool is_layerscape_lpuart(struct lpuart_port *sport) in is_layerscape_lpuart() argument
316 return (sport->devtype == LS1021A_LPUART || in is_layerscape_lpuart()
317 sport->devtype == LS1028A_LPUART); in is_layerscape_lpuart()
320 static inline bool is_imx8qxp_lpuart(struct lpuart_port *sport) in is_imx8qxp_lpuart() argument
322 return sport->devtype == IMX8QXP_LPUART; in is_imx8qxp_lpuart()
350 static int __lpuart_enable_clks(struct lpuart_port *sport, bool is_en) in __lpuart_enable_clks() argument
355 ret = clk_prepare_enable(sport->ipg_clk); in __lpuart_enable_clks()
359 ret = clk_prepare_enable(sport->baud_clk); in __lpuart_enable_clks()
361 clk_disable_unprepare(sport->ipg_clk); in __lpuart_enable_clks()
365 clk_disable_unprepare(sport->baud_clk); in __lpuart_enable_clks()
366 clk_disable_unprepare(sport->ipg_clk); in __lpuart_enable_clks()
372 static unsigned int lpuart_get_baud_clk_rate(struct lpuart_port *sport) in lpuart_get_baud_clk_rate() argument
374 if (is_imx8qxp_lpuart(sport)) in lpuart_get_baud_clk_rate()
375 return clk_get_rate(sport->baud_clk); in lpuart_get_baud_clk_rate()
377 return clk_get_rate(sport->ipg_clk); in lpuart_get_baud_clk_rate()
417 static void lpuart_dma_tx(struct lpuart_port *sport) in lpuart_dma_tx() argument
419 struct circ_buf *xmit = &sport->port.state->xmit; in lpuart_dma_tx()
420 struct scatterlist *sgl = sport->tx_sgl; in lpuart_dma_tx()
421 struct device *dev = sport->port.dev; in lpuart_dma_tx()
422 struct dma_chan *chan = sport->dma_tx_chan; in lpuart_dma_tx()
425 if (sport->dma_tx_in_progress) in lpuart_dma_tx()
428 sport->dma_tx_bytes = uart_circ_chars_pending(xmit); in lpuart_dma_tx()
431 sport->dma_tx_nents = 1; in lpuart_dma_tx()
432 sg_init_one(sgl, xmit->buf + xmit->tail, sport->dma_tx_bytes); in lpuart_dma_tx()
434 sport->dma_tx_nents = 2; in lpuart_dma_tx()
441 ret = dma_map_sg(chan->device->dev, sgl, sport->dma_tx_nents, in lpuart_dma_tx()
448 sport->dma_tx_desc = dmaengine_prep_slave_sg(chan, sgl, in lpuart_dma_tx()
451 if (!sport->dma_tx_desc) { in lpuart_dma_tx()
452 dma_unmap_sg(chan->device->dev, sgl, sport->dma_tx_nents, in lpuart_dma_tx()
458 sport->dma_tx_desc->callback = lpuart_dma_tx_complete; in lpuart_dma_tx()
459 sport->dma_tx_desc->callback_param = sport; in lpuart_dma_tx()
460 sport->dma_tx_in_progress = true; in lpuart_dma_tx()
461 sport->dma_tx_cookie = dmaengine_submit(sport->dma_tx_desc); in lpuart_dma_tx()
472 struct lpuart_port *sport = arg; in lpuart_dma_tx_complete() local
473 struct scatterlist *sgl = &sport->tx_sgl[0]; in lpuart_dma_tx_complete()
474 struct circ_buf *xmit = &sport->port.state->xmit; in lpuart_dma_tx_complete()
475 struct dma_chan *chan = sport->dma_tx_chan; in lpuart_dma_tx_complete()
478 spin_lock_irqsave(&sport->port.lock, flags); in lpuart_dma_tx_complete()
480 dma_unmap_sg(chan->device->dev, sgl, sport->dma_tx_nents, in lpuart_dma_tx_complete()
483 xmit->tail = (xmit->tail + sport->dma_tx_bytes) & (UART_XMIT_SIZE - 1); in lpuart_dma_tx_complete()
485 sport->port.icount.tx += sport->dma_tx_bytes; in lpuart_dma_tx_complete()
486 sport->dma_tx_in_progress = false; in lpuart_dma_tx_complete()
487 spin_unlock_irqrestore(&sport->port.lock, flags); in lpuart_dma_tx_complete()
490 uart_write_wakeup(&sport->port); in lpuart_dma_tx_complete()
492 if (waitqueue_active(&sport->dma_wait)) { in lpuart_dma_tx_complete()
493 wake_up(&sport->dma_wait); in lpuart_dma_tx_complete()
497 spin_lock_irqsave(&sport->port.lock, flags); in lpuart_dma_tx_complete()
499 if (!lpuart_stopped_or_empty(&sport->port)) in lpuart_dma_tx_complete()
500 lpuart_dma_tx(sport); in lpuart_dma_tx_complete()
502 spin_unlock_irqrestore(&sport->port.lock, flags); in lpuart_dma_tx_complete()
505 static dma_addr_t lpuart_dma_datareg_addr(struct lpuart_port *sport) in lpuart_dma_datareg_addr() argument
507 switch (sport->port.iotype) { in lpuart_dma_datareg_addr()
509 return sport->port.mapbase + UARTDATA; in lpuart_dma_datareg_addr()
511 return sport->port.mapbase + UARTDATA + sizeof(u32) - 1; in lpuart_dma_datareg_addr()
513 return sport->port.mapbase + UARTDR; in lpuart_dma_datareg_addr()
518 struct lpuart_port *sport = container_of(port, in lpuart_dma_tx_request() local
523 dma_tx_sconfig.dst_addr = lpuart_dma_datareg_addr(sport); in lpuart_dma_tx_request()
527 ret = dmaengine_slave_config(sport->dma_tx_chan, &dma_tx_sconfig); in lpuart_dma_tx_request()
530 dev_err(sport->port.dev, in lpuart_dma_tx_request()
538 static bool lpuart_is_32(struct lpuart_port *sport) in lpuart_is_32() argument
540 return sport->port.iotype == UPIO_MEM32 || in lpuart_is_32()
541 sport->port.iotype == UPIO_MEM32BE; in lpuart_is_32()
546 struct lpuart_port *sport = container_of(port, struct lpuart_port, port); in lpuart_flush_buffer() local
547 struct dma_chan *chan = sport->dma_tx_chan; in lpuart_flush_buffer()
550 if (sport->lpuart_dma_tx_use) { in lpuart_flush_buffer()
551 if (sport->dma_tx_in_progress) { in lpuart_flush_buffer()
552 dma_unmap_sg(chan->device->dev, &sport->tx_sgl[0], in lpuart_flush_buffer()
553 sport->dma_tx_nents, DMA_TO_DEVICE); in lpuart_flush_buffer()
554 sport->dma_tx_in_progress = false; in lpuart_flush_buffer()
559 if (lpuart_is_32(sport)) { in lpuart_flush_buffer()
560 val = lpuart32_read(&sport->port, UARTFIFO); in lpuart_flush_buffer()
562 lpuart32_write(&sport->port, val, UARTFIFO); in lpuart_flush_buffer()
564 val = readb(sport->port.membase + UARTCFIFO); in lpuart_flush_buffer()
566 writeb(val, sport->port.membase + UARTCFIFO); in lpuart_flush_buffer()
588 struct lpuart_port *sport = container_of(port, in lpuart_poll_init() local
593 sport->port.fifosize = 0; in lpuart_poll_init()
595 spin_lock_irqsave(&sport->port.lock, flags); in lpuart_poll_init()
597 writeb(0, sport->port.membase + UARTCR2); in lpuart_poll_init()
599 temp = readb(sport->port.membase + UARTPFIFO); in lpuart_poll_init()
602 sport->port.membase + UARTPFIFO); in lpuart_poll_init()
606 sport->port.membase + UARTCFIFO); in lpuart_poll_init()
609 if (readb(sport->port.membase + UARTSR1) & UARTSR1_RDRF) { in lpuart_poll_init()
610 readb(sport->port.membase + UARTDR); in lpuart_poll_init()
611 writeb(UARTSFIFO_RXUF, sport->port.membase + UARTSFIFO); in lpuart_poll_init()
614 writeb(0, sport->port.membase + UARTTWFIFO); in lpuart_poll_init()
615 writeb(1, sport->port.membase + UARTRWFIFO); in lpuart_poll_init()
618 writeb(UARTCR2_RE | UARTCR2_TE, sport->port.membase + UARTCR2); in lpuart_poll_init()
619 spin_unlock_irqrestore(&sport->port.lock, flags); in lpuart_poll_init()
642 struct lpuart_port *sport = container_of(port, struct lpuart_port, port); in lpuart32_poll_init() local
645 sport->port.fifosize = 0; in lpuart32_poll_init()
647 spin_lock_irqsave(&sport->port.lock, flags); in lpuart32_poll_init()
650 lpuart32_write(&sport->port, 0, UARTCTRL); in lpuart32_poll_init()
652 temp = lpuart32_read(&sport->port, UARTFIFO); in lpuart32_poll_init()
655 lpuart32_write(&sport->port, temp | UARTFIFO_RXFE | UARTFIFO_TXFE, UARTFIFO); in lpuart32_poll_init()
658 lpuart32_write(&sport->port, UARTFIFO_TXFLUSH | UARTFIFO_RXFLUSH, UARTFIFO); in lpuart32_poll_init()
661 if (lpuart32_read(&sport->port, UARTSTAT) & UARTSTAT_RDRF) { in lpuart32_poll_init()
662 lpuart32_read(&sport->port, UARTDATA); in lpuart32_poll_init()
663 lpuart32_write(&sport->port, UARTFIFO_RXUF, UARTFIFO); in lpuart32_poll_init()
667 lpuart32_write(&sport->port, UARTCTRL_RE | UARTCTRL_TE, UARTCTRL); in lpuart32_poll_init()
668 spin_unlock_irqrestore(&sport->port.lock, flags); in lpuart32_poll_init()
688 static inline void lpuart_transmit_buffer(struct lpuart_port *sport) in lpuart_transmit_buffer() argument
690 struct circ_buf *xmit = &sport->port.state->xmit; in lpuart_transmit_buffer()
692 if (sport->port.x_char) { in lpuart_transmit_buffer()
693 writeb(sport->port.x_char, sport->port.membase + UARTDR); in lpuart_transmit_buffer()
694 sport->port.icount.tx++; in lpuart_transmit_buffer()
695 sport->port.x_char = 0; in lpuart_transmit_buffer()
699 if (lpuart_stopped_or_empty(&sport->port)) { in lpuart_transmit_buffer()
700 lpuart_stop_tx(&sport->port); in lpuart_transmit_buffer()
705 (readb(sport->port.membase + UARTTCFIFO) < sport->txfifo_size)) { in lpuart_transmit_buffer()
706 writeb(xmit->buf[xmit->tail], sport->port.membase + UARTDR); in lpuart_transmit_buffer()
708 sport->port.icount.tx++; in lpuart_transmit_buffer()
712 uart_write_wakeup(&sport->port); in lpuart_transmit_buffer()
715 lpuart_stop_tx(&sport->port); in lpuart_transmit_buffer()
718 static inline void lpuart32_transmit_buffer(struct lpuart_port *sport) in lpuart32_transmit_buffer() argument
720 struct circ_buf *xmit = &sport->port.state->xmit; in lpuart32_transmit_buffer()
723 if (sport->port.x_char) { in lpuart32_transmit_buffer()
724 lpuart32_write(&sport->port, sport->port.x_char, UARTDATA); in lpuart32_transmit_buffer()
725 sport->port.icount.tx++; in lpuart32_transmit_buffer()
726 sport->port.x_char = 0; in lpuart32_transmit_buffer()
730 if (lpuart_stopped_or_empty(&sport->port)) { in lpuart32_transmit_buffer()
731 lpuart32_stop_tx(&sport->port); in lpuart32_transmit_buffer()
735 txcnt = lpuart32_read(&sport->port, UARTWATER); in lpuart32_transmit_buffer()
738 while (!uart_circ_empty(xmit) && (txcnt < sport->txfifo_size)) { in lpuart32_transmit_buffer()
739 lpuart32_write(&sport->port, xmit->buf[xmit->tail], UARTDATA); in lpuart32_transmit_buffer()
741 sport->port.icount.tx++; in lpuart32_transmit_buffer()
742 txcnt = lpuart32_read(&sport->port, UARTWATER); in lpuart32_transmit_buffer()
748 uart_write_wakeup(&sport->port); in lpuart32_transmit_buffer()
751 lpuart32_stop_tx(&sport->port); in lpuart32_transmit_buffer()
756 struct lpuart_port *sport = container_of(port, in lpuart_start_tx() local
763 if (sport->lpuart_dma_tx_use) { in lpuart_start_tx()
765 lpuart_dma_tx(sport); in lpuart_start_tx()
768 lpuart_transmit_buffer(sport); in lpuart_start_tx()
774 struct lpuart_port *sport = container_of(port, struct lpuart_port, port); in lpuart32_start_tx() local
777 if (sport->lpuart_dma_tx_use) { in lpuart32_start_tx()
779 lpuart_dma_tx(sport); in lpuart32_start_tx()
785 lpuart32_transmit_buffer(sport); in lpuart32_start_tx()
792 struct lpuart_port *sport = container_of(port, in lpuart_tx_empty() local
797 if (sport->dma_tx_in_progress) in lpuart_tx_empty()
808 struct lpuart_port *sport = container_of(port, in lpuart32_tx_empty() local
813 if (sport->dma_tx_in_progress) in lpuart32_tx_empty()
822 static void lpuart_txint(struct lpuart_port *sport) in lpuart_txint() argument
826 spin_lock_irqsave(&sport->port.lock, flags); in lpuart_txint()
827 lpuart_transmit_buffer(sport); in lpuart_txint()
828 spin_unlock_irqrestore(&sport->port.lock, flags); in lpuart_txint()
831 static void lpuart_rxint(struct lpuart_port *sport) in lpuart_rxint() argument
834 struct tty_port *port = &sport->port.state->port; in lpuart_rxint()
838 spin_lock_irqsave(&sport->port.lock, flags); in lpuart_rxint()
840 while (!(readb(sport->port.membase + UARTSFIFO) & UARTSFIFO_RXEMPT)) { in lpuart_rxint()
842 sport->port.icount.rx++; in lpuart_rxint()
847 sr = readb(sport->port.membase + UARTSR1); in lpuart_rxint()
848 rx = readb(sport->port.membase + UARTDR); in lpuart_rxint()
850 if (uart_handle_sysrq_char(&sport->port, (unsigned char)rx)) in lpuart_rxint()
855 sport->port.icount.parity++; in lpuart_rxint()
857 sport->port.icount.frame++; in lpuart_rxint()
862 if (sr & sport->port.ignore_status_mask) { in lpuart_rxint()
868 sr &= sport->port.read_status_mask; in lpuart_rxint()
878 sport->port.sysrq = 0; in lpuart_rxint()
886 sport->port.icount.overrun += overrun; in lpuart_rxint()
892 writeb(UARTCFIFO_RXFLUSH, sport->port.membase + UARTCFIFO); in lpuart_rxint()
893 writeb(UARTSFIFO_RXOF, sport->port.membase + UARTSFIFO); in lpuart_rxint()
896 spin_unlock_irqrestore(&sport->port.lock, flags); in lpuart_rxint()
901 static void lpuart32_txint(struct lpuart_port *sport) in lpuart32_txint() argument
905 spin_lock_irqsave(&sport->port.lock, flags); in lpuart32_txint()
906 lpuart32_transmit_buffer(sport); in lpuart32_txint()
907 spin_unlock_irqrestore(&sport->port.lock, flags); in lpuart32_txint()
910 static void lpuart32_rxint(struct lpuart_port *sport) in lpuart32_rxint() argument
913 struct tty_port *port = &sport->port.state->port; in lpuart32_rxint()
917 spin_lock_irqsave(&sport->port.lock, flags); in lpuart32_rxint()
919 while (!(lpuart32_read(&sport->port, UARTFIFO) & UARTFIFO_RXEMPT)) { in lpuart32_rxint()
921 sport->port.icount.rx++; in lpuart32_rxint()
926 sr = lpuart32_read(&sport->port, UARTSTAT); in lpuart32_rxint()
927 rx = lpuart32_read(&sport->port, UARTDATA); in lpuart32_rxint()
930 if (uart_handle_sysrq_char(&sport->port, (unsigned char)rx)) in lpuart32_rxint()
935 sport->port.icount.parity++; in lpuart32_rxint()
937 sport->port.icount.frame++; in lpuart32_rxint()
940 sport->port.icount.overrun++; in lpuart32_rxint()
942 if (sr & sport->port.ignore_status_mask) { in lpuart32_rxint()
948 sr &= sport->port.read_status_mask; in lpuart32_rxint()
958 sport->port.sysrq = 0; in lpuart32_rxint()
965 spin_unlock_irqrestore(&sport->port.lock, flags); in lpuart32_rxint()
972 struct lpuart_port *sport = dev_id; in lpuart_int() local
975 sts = readb(sport->port.membase + UARTSR1); in lpuart_int()
978 if (sts & UARTSR1_FE && sport->lpuart_dma_rx_use) { in lpuart_int()
979 readb(sport->port.membase + UARTDR); in lpuart_int()
980 uart_handle_break(&sport->port); in lpuart_int()
982 writeb(UARTCFIFO_RXFLUSH, sport->port.membase + UARTCFIFO); in lpuart_int()
986 if (sts & UARTSR1_RDRF && !sport->lpuart_dma_rx_use) in lpuart_int()
987 lpuart_rxint(sport); in lpuart_int()
989 if (sts & UARTSR1_TDRE && !sport->lpuart_dma_tx_use) in lpuart_int()
990 lpuart_txint(sport); in lpuart_int()
997 struct lpuart_port *sport = dev_id; in lpuart32_int() local
1000 sts = lpuart32_read(&sport->port, UARTSTAT); in lpuart32_int()
1001 rxcount = lpuart32_read(&sport->port, UARTWATER); in lpuart32_int()
1004 if ((sts & UARTSTAT_RDRF || rxcount > 0) && !sport->lpuart_dma_rx_use) in lpuart32_int()
1005 lpuart32_rxint(sport); in lpuart32_int()
1007 if ((sts & UARTSTAT_TDRE) && !sport->lpuart_dma_tx_use) in lpuart32_int()
1008 lpuart32_txint(sport); in lpuart32_int()
1010 lpuart32_write(&sport->port, sts, UARTSTAT); in lpuart32_int()
1025 static void lpuart_handle_sysrq(struct lpuart_port *sport) in lpuart_handle_sysrq() argument
1027 struct circ_buf *ring = &sport->rx_ring; in lpuart_handle_sysrq()
1031 count = sport->rx_sgl.length - ring->tail; in lpuart_handle_sysrq()
1032 lpuart_handle_sysrq_chars(&sport->port, in lpuart_handle_sysrq()
1039 lpuart_handle_sysrq_chars(&sport->port, in lpuart_handle_sysrq()
1045 static void lpuart_copy_rx_to_tty(struct lpuart_port *sport) in lpuart_copy_rx_to_tty() argument
1047 struct tty_port *port = &sport->port.state->port; in lpuart_copy_rx_to_tty()
1050 struct dma_chan *chan = sport->dma_rx_chan; in lpuart_copy_rx_to_tty()
1051 struct circ_buf *ring = &sport->rx_ring; in lpuart_copy_rx_to_tty()
1055 if (lpuart_is_32(sport)) { in lpuart_copy_rx_to_tty()
1056 unsigned long sr = lpuart32_read(&sport->port, UARTSTAT); in lpuart_copy_rx_to_tty()
1060 lpuart32_read(&sport->port, UARTDATA); in lpuart_copy_rx_to_tty()
1063 sport->port.icount.parity++; in lpuart_copy_rx_to_tty()
1065 sport->port.icount.frame++; in lpuart_copy_rx_to_tty()
1068 unsigned char sr = readb(sport->port.membase + UARTSR1); in lpuart_copy_rx_to_tty()
1074 cr2 = readb(sport->port.membase + UARTCR2); in lpuart_copy_rx_to_tty()
1076 writeb(cr2, sport->port.membase + UARTCR2); in lpuart_copy_rx_to_tty()
1079 readb(sport->port.membase + UARTDR); in lpuart_copy_rx_to_tty()
1082 sport->port.icount.parity++; in lpuart_copy_rx_to_tty()
1084 sport->port.icount.frame++; in lpuart_copy_rx_to_tty()
1094 if (readb(sport->port.membase + UARTSFIFO) & in lpuart_copy_rx_to_tty()
1097 sport->port.membase + UARTSFIFO); in lpuart_copy_rx_to_tty()
1099 sport->port.membase + UARTCFIFO); in lpuart_copy_rx_to_tty()
1103 writeb(cr2, sport->port.membase + UARTCR2); in lpuart_copy_rx_to_tty()
1107 async_tx_ack(sport->dma_rx_desc); in lpuart_copy_rx_to_tty()
1109 spin_lock_irqsave(&sport->port.lock, flags); in lpuart_copy_rx_to_tty()
1111 dmastat = dmaengine_tx_status(chan, sport->dma_rx_cookie, &state); in lpuart_copy_rx_to_tty()
1113 dev_err(sport->port.dev, "Rx DMA transfer failed!\n"); in lpuart_copy_rx_to_tty()
1114 spin_unlock_irqrestore(&sport->port.lock, flags); in lpuart_copy_rx_to_tty()
1119 dma_sync_sg_for_cpu(chan->device->dev, &sport->rx_sgl, 1, in lpuart_copy_rx_to_tty()
1129 ring->head = sport->rx_sgl.length - state.residue; in lpuart_copy_rx_to_tty()
1130 BUG_ON(ring->head > sport->rx_sgl.length); in lpuart_copy_rx_to_tty()
1135 if (sport->port.sysrq) { in lpuart_copy_rx_to_tty()
1136 lpuart_handle_sysrq(sport); in lpuart_copy_rx_to_tty()
1153 count = sport->rx_sgl.length - ring->tail; in lpuart_copy_rx_to_tty()
1157 sport->port.icount.rx += count; in lpuart_copy_rx_to_tty()
1165 if (ring->head >= sport->rx_sgl.length) in lpuart_copy_rx_to_tty()
1168 sport->port.icount.rx += count; in lpuart_copy_rx_to_tty()
1172 dma_sync_sg_for_device(chan->device->dev, &sport->rx_sgl, 1, in lpuart_copy_rx_to_tty()
1175 spin_unlock_irqrestore(&sport->port.lock, flags); in lpuart_copy_rx_to_tty()
1178 mod_timer(&sport->lpuart_timer, jiffies + sport->dma_rx_timeout); in lpuart_copy_rx_to_tty()
1183 struct lpuart_port *sport = arg; in lpuart_dma_rx_complete() local
1185 lpuart_copy_rx_to_tty(sport); in lpuart_dma_rx_complete()
1190 struct lpuart_port *sport = from_timer(sport, t, lpuart_timer); in lpuart_timer_func() local
1192 lpuart_copy_rx_to_tty(sport); in lpuart_timer_func()
1195 static inline int lpuart_start_rx_dma(struct lpuart_port *sport) in lpuart_start_rx_dma() argument
1198 struct circ_buf *ring = &sport->rx_ring; in lpuart_start_rx_dma()
1201 struct tty_port *port = &sport->port.state->port; in lpuart_start_rx_dma()
1204 struct dma_chan *chan = sport->dma_rx_chan; in lpuart_start_rx_dma()
1216 sport->rx_dma_rng_buf_len = (DMA_RX_TIMEOUT * baud / bits / 1000) * 2; in lpuart_start_rx_dma()
1217 sport->rx_dma_rng_buf_len = (1 << (fls(sport->rx_dma_rng_buf_len) - 1)); in lpuart_start_rx_dma()
1218 if (sport->rx_dma_rng_buf_len < 16) in lpuart_start_rx_dma()
1219 sport->rx_dma_rng_buf_len = 16; in lpuart_start_rx_dma()
1221 ring->buf = kzalloc(sport->rx_dma_rng_buf_len, GFP_ATOMIC); in lpuart_start_rx_dma()
1225 sg_init_one(&sport->rx_sgl, ring->buf, sport->rx_dma_rng_buf_len); in lpuart_start_rx_dma()
1226 nent = dma_map_sg(chan->device->dev, &sport->rx_sgl, 1, in lpuart_start_rx_dma()
1230 dev_err(sport->port.dev, "DMA Rx mapping error\n"); in lpuart_start_rx_dma()
1234 dma_rx_sconfig.src_addr = lpuart_dma_datareg_addr(sport); in lpuart_start_rx_dma()
1241 dev_err(sport->port.dev, in lpuart_start_rx_dma()
1246 sport->dma_rx_desc = dmaengine_prep_dma_cyclic(chan, in lpuart_start_rx_dma()
1247 sg_dma_address(&sport->rx_sgl), in lpuart_start_rx_dma()
1248 sport->rx_sgl.length, in lpuart_start_rx_dma()
1249 sport->rx_sgl.length / 2, in lpuart_start_rx_dma()
1252 if (!sport->dma_rx_desc) { in lpuart_start_rx_dma()
1253 dev_err(sport->port.dev, "Cannot prepare cyclic DMA\n"); in lpuart_start_rx_dma()
1257 sport->dma_rx_desc->callback = lpuart_dma_rx_complete; in lpuart_start_rx_dma()
1258 sport->dma_rx_desc->callback_param = sport; in lpuart_start_rx_dma()
1259 sport->dma_rx_cookie = dmaengine_submit(sport->dma_rx_desc); in lpuart_start_rx_dma()
1262 if (lpuart_is_32(sport)) { in lpuart_start_rx_dma()
1263 unsigned long temp = lpuart32_read(&sport->port, UARTBAUD); in lpuart_start_rx_dma()
1265 lpuart32_write(&sport->port, temp | UARTBAUD_RDMAE, UARTBAUD); in lpuart_start_rx_dma()
1267 writeb(readb(sport->port.membase + UARTCR5) | UARTCR5_RDMAS, in lpuart_start_rx_dma()
1268 sport->port.membase + UARTCR5); in lpuart_start_rx_dma()
1276 struct lpuart_port *sport = container_of(port, in lpuart_dma_rx_free() local
1278 struct dma_chan *chan = sport->dma_rx_chan; in lpuart_dma_rx_free()
1281 dma_unmap_sg(chan->device->dev, &sport->rx_sgl, 1, DMA_FROM_DEVICE); in lpuart_dma_rx_free()
1282 kfree(sport->rx_ring.buf); in lpuart_dma_rx_free()
1283 sport->rx_ring.tail = 0; in lpuart_dma_rx_free()
1284 sport->rx_ring.head = 0; in lpuart_dma_rx_free()
1285 sport->dma_rx_desc = NULL; in lpuart_dma_rx_free()
1286 sport->dma_rx_cookie = -EINVAL; in lpuart_dma_rx_free()
1292 struct lpuart_port *sport = container_of(port, in lpuart_config_rs485() local
1295 u8 modem = readb(sport->port.membase + UARTMODEM) & in lpuart_config_rs485()
1297 writeb(modem, sport->port.membase + UARTMODEM); in lpuart_config_rs485()
1334 sport->port.rs485 = *rs485; in lpuart_config_rs485()
1336 writeb(modem, sport->port.membase + UARTMODEM); in lpuart_config_rs485()
1343 struct lpuart_port *sport = container_of(port, in lpuart32_config_rs485() local
1346 unsigned long modem = lpuart32_read(&sport->port, UARTMODIR) in lpuart32_config_rs485()
1348 lpuart32_write(&sport->port, modem, UARTMODIR); in lpuart32_config_rs485()
1385 sport->port.rs485 = *rs485; in lpuart32_config_rs485()
1387 lpuart32_write(&sport->port, modem, UARTMODIR); in lpuart32_config_rs485()
1414 struct lpuart_port *sport = container_of(port, in lpuart_set_mctrl() local
1418 if (!(sport->port.rs485.flags & SER_RS485_ENABLED)) { in lpuart_set_mctrl()
1419 temp = readb(sport->port.membase + UARTMODEM) & in lpuart_set_mctrl()
1461 static void lpuart_setup_watermark(struct lpuart_port *sport) in lpuart_setup_watermark() argument
1466 cr2 = readb(sport->port.membase + UARTCR2); in lpuart_setup_watermark()
1470 writeb(cr2, sport->port.membase + UARTCR2); in lpuart_setup_watermark()
1472 val = readb(sport->port.membase + UARTPFIFO); in lpuart_setup_watermark()
1474 sport->port.membase + UARTPFIFO); in lpuart_setup_watermark()
1478 sport->port.membase + UARTCFIFO); in lpuart_setup_watermark()
1481 if (readb(sport->port.membase + UARTSR1) & UARTSR1_RDRF) { in lpuart_setup_watermark()
1482 readb(sport->port.membase + UARTDR); in lpuart_setup_watermark()
1483 writeb(UARTSFIFO_RXUF, sport->port.membase + UARTSFIFO); in lpuart_setup_watermark()
1486 writeb(0, sport->port.membase + UARTTWFIFO); in lpuart_setup_watermark()
1487 writeb(1, sport->port.membase + UARTRWFIFO); in lpuart_setup_watermark()
1490 writeb(cr2_saved, sport->port.membase + UARTCR2); in lpuart_setup_watermark()
1493 static void lpuart_setup_watermark_enable(struct lpuart_port *sport) in lpuart_setup_watermark_enable() argument
1497 lpuart_setup_watermark(sport); in lpuart_setup_watermark_enable()
1499 cr2 = readb(sport->port.membase + UARTCR2); in lpuart_setup_watermark_enable()
1501 writeb(cr2, sport->port.membase + UARTCR2); in lpuart_setup_watermark_enable()
1504 static void lpuart32_setup_watermark(struct lpuart_port *sport) in lpuart32_setup_watermark() argument
1509 ctrl = lpuart32_read(&sport->port, UARTCTRL); in lpuart32_setup_watermark()
1513 lpuart32_write(&sport->port, ctrl, UARTCTRL); in lpuart32_setup_watermark()
1516 val = lpuart32_read(&sport->port, UARTFIFO); in lpuart32_setup_watermark()
1519 lpuart32_write(&sport->port, val, UARTFIFO); in lpuart32_setup_watermark()
1523 lpuart32_write(&sport->port, val, UARTWATER); in lpuart32_setup_watermark()
1526 lpuart32_write(&sport->port, ctrl_saved, UARTCTRL); in lpuart32_setup_watermark()
1529 static void lpuart32_setup_watermark_enable(struct lpuart_port *sport) in lpuart32_setup_watermark_enable() argument
1533 lpuart32_setup_watermark(sport); in lpuart32_setup_watermark_enable()
1535 temp = lpuart32_read(&sport->port, UARTCTRL); in lpuart32_setup_watermark_enable()
1537 lpuart32_write(&sport->port, temp, UARTCTRL); in lpuart32_setup_watermark_enable()
1540 static void rx_dma_timer_init(struct lpuart_port *sport) in rx_dma_timer_init() argument
1542 timer_setup(&sport->lpuart_timer, lpuart_timer_func, 0); in rx_dma_timer_init()
1543 sport->lpuart_timer.expires = jiffies + sport->dma_rx_timeout; in rx_dma_timer_init()
1544 add_timer(&sport->lpuart_timer); in rx_dma_timer_init()
1547 static void lpuart_request_dma(struct lpuart_port *sport) in lpuart_request_dma() argument
1549 sport->dma_tx_chan = dma_request_chan(sport->port.dev, "tx"); in lpuart_request_dma()
1550 if (IS_ERR(sport->dma_tx_chan)) { in lpuart_request_dma()
1551 dev_dbg_once(sport->port.dev, in lpuart_request_dma()
1553 PTR_ERR(sport->dma_tx_chan)); in lpuart_request_dma()
1554 sport->dma_tx_chan = NULL; in lpuart_request_dma()
1557 sport->dma_rx_chan = dma_request_chan(sport->port.dev, "rx"); in lpuart_request_dma()
1558 if (IS_ERR(sport->dma_rx_chan)) { in lpuart_request_dma()
1559 dev_dbg_once(sport->port.dev, in lpuart_request_dma()
1561 PTR_ERR(sport->dma_rx_chan)); in lpuart_request_dma()
1562 sport->dma_rx_chan = NULL; in lpuart_request_dma()
1566 static void lpuart_tx_dma_startup(struct lpuart_port *sport) in lpuart_tx_dma_startup() argument
1571 if (uart_console(&sport->port)) in lpuart_tx_dma_startup()
1574 if (!sport->dma_tx_chan) in lpuart_tx_dma_startup()
1577 ret = lpuart_dma_tx_request(&sport->port); in lpuart_tx_dma_startup()
1581 init_waitqueue_head(&sport->dma_wait); in lpuart_tx_dma_startup()
1582 sport->lpuart_dma_tx_use = true; in lpuart_tx_dma_startup()
1583 if (lpuart_is_32(sport)) { in lpuart_tx_dma_startup()
1584 uartbaud = lpuart32_read(&sport->port, UARTBAUD); in lpuart_tx_dma_startup()
1585 lpuart32_write(&sport->port, in lpuart_tx_dma_startup()
1588 writeb(readb(sport->port.membase + UARTCR5) | in lpuart_tx_dma_startup()
1589 UARTCR5_TDMAS, sport->port.membase + UARTCR5); in lpuart_tx_dma_startup()
1595 sport->lpuart_dma_tx_use = false; in lpuart_tx_dma_startup()
1598 static void lpuart_rx_dma_startup(struct lpuart_port *sport) in lpuart_rx_dma_startup() argument
1603 if (uart_console(&sport->port)) in lpuart_rx_dma_startup()
1606 if (!sport->dma_rx_chan) in lpuart_rx_dma_startup()
1609 ret = lpuart_start_rx_dma(sport); in lpuart_rx_dma_startup()
1614 sport->dma_rx_timeout = msecs_to_jiffies(DMA_RX_TIMEOUT); in lpuart_rx_dma_startup()
1615 if (!sport->dma_rx_timeout) in lpuart_rx_dma_startup()
1616 sport->dma_rx_timeout = 1; in lpuart_rx_dma_startup()
1618 sport->lpuart_dma_rx_use = true; in lpuart_rx_dma_startup()
1619 rx_dma_timer_init(sport); in lpuart_rx_dma_startup()
1621 if (sport->port.has_sysrq && !lpuart_is_32(sport)) { in lpuart_rx_dma_startup()
1622 cr3 = readb(sport->port.membase + UARTCR3); in lpuart_rx_dma_startup()
1624 writeb(cr3, sport->port.membase + UARTCR3); in lpuart_rx_dma_startup()
1630 sport->lpuart_dma_rx_use = false; in lpuart_rx_dma_startup()
1635 struct lpuart_port *sport = container_of(port, struct lpuart_port, port); in lpuart_startup() local
1640 temp = readb(sport->port.membase + UARTPFIFO); in lpuart_startup()
1642 sport->txfifo_size = UARTFIFO_DEPTH((temp >> UARTPFIFO_TXSIZE_OFF) & in lpuart_startup()
1644 sport->port.fifosize = sport->txfifo_size; in lpuart_startup()
1646 sport->rxfifo_size = UARTFIFO_DEPTH((temp >> UARTPFIFO_RXSIZE_OFF) & in lpuart_startup()
1649 lpuart_request_dma(sport); in lpuart_startup()
1651 spin_lock_irqsave(&sport->port.lock, flags); in lpuart_startup()
1653 lpuart_setup_watermark_enable(sport); in lpuart_startup()
1655 lpuart_rx_dma_startup(sport); in lpuart_startup()
1656 lpuart_tx_dma_startup(sport); in lpuart_startup()
1658 spin_unlock_irqrestore(&sport->port.lock, flags); in lpuart_startup()
1663 static void lpuart32_configure(struct lpuart_port *sport) in lpuart32_configure() argument
1667 if (sport->lpuart_dma_rx_use) { in lpuart32_configure()
1669 temp = lpuart32_read(&sport->port, UARTWATER); in lpuart32_configure()
1671 lpuart32_write(&sport->port, temp, UARTWATER); in lpuart32_configure()
1673 temp = lpuart32_read(&sport->port, UARTCTRL); in lpuart32_configure()
1674 if (!sport->lpuart_dma_rx_use) in lpuart32_configure()
1676 if (!sport->lpuart_dma_tx_use) in lpuart32_configure()
1678 lpuart32_write(&sport->port, temp, UARTCTRL); in lpuart32_configure()
1683 struct lpuart_port *sport = container_of(port, struct lpuart_port, port); in lpuart32_startup() local
1688 temp = lpuart32_read(&sport->port, UARTFIFO); in lpuart32_startup()
1690 sport->txfifo_size = UARTFIFO_DEPTH((temp >> UARTFIFO_TXSIZE_OFF) & in lpuart32_startup()
1692 sport->port.fifosize = sport->txfifo_size; in lpuart32_startup()
1694 sport->rxfifo_size = UARTFIFO_DEPTH((temp >> UARTFIFO_RXSIZE_OFF) & in lpuart32_startup()
1702 if (is_layerscape_lpuart(sport)) { in lpuart32_startup()
1703 sport->rxfifo_size = 16; in lpuart32_startup()
1704 sport->txfifo_size = 16; in lpuart32_startup()
1705 sport->port.fifosize = sport->txfifo_size; in lpuart32_startup()
1708 lpuart_request_dma(sport); in lpuart32_startup()
1710 spin_lock_irqsave(&sport->port.lock, flags); in lpuart32_startup()
1712 lpuart32_setup_watermark_enable(sport); in lpuart32_startup()
1714 lpuart_rx_dma_startup(sport); in lpuart32_startup()
1715 lpuart_tx_dma_startup(sport); in lpuart32_startup()
1717 lpuart32_configure(sport); in lpuart32_startup()
1719 spin_unlock_irqrestore(&sport->port.lock, flags); in lpuart32_startup()
1723 static void lpuart_dma_shutdown(struct lpuart_port *sport) in lpuart_dma_shutdown() argument
1725 if (sport->lpuart_dma_rx_use) { in lpuart_dma_shutdown()
1726 del_timer_sync(&sport->lpuart_timer); in lpuart_dma_shutdown()
1727 lpuart_dma_rx_free(&sport->port); in lpuart_dma_shutdown()
1728 sport->lpuart_dma_rx_use = false; in lpuart_dma_shutdown()
1731 if (sport->lpuart_dma_tx_use) { in lpuart_dma_shutdown()
1732 if (wait_event_interruptible(sport->dma_wait, in lpuart_dma_shutdown()
1733 !sport->dma_tx_in_progress) != false) { in lpuart_dma_shutdown()
1734 sport->dma_tx_in_progress = false; in lpuart_dma_shutdown()
1735 dmaengine_terminate_all(sport->dma_tx_chan); in lpuart_dma_shutdown()
1737 sport->lpuart_dma_tx_use = false; in lpuart_dma_shutdown()
1740 if (sport->dma_tx_chan) in lpuart_dma_shutdown()
1741 dma_release_channel(sport->dma_tx_chan); in lpuart_dma_shutdown()
1742 if (sport->dma_rx_chan) in lpuart_dma_shutdown()
1743 dma_release_channel(sport->dma_rx_chan); in lpuart_dma_shutdown()
1748 struct lpuart_port *sport = container_of(port, struct lpuart_port, port); in lpuart_shutdown() local
1762 lpuart_dma_shutdown(sport); in lpuart_shutdown()
1767 struct lpuart_port *sport = in lpuart32_shutdown() local
1782 lpuart_dma_shutdown(sport); in lpuart32_shutdown()
1789 struct lpuart_port *sport = container_of(port, struct lpuart_port, port); in lpuart_set_termios() local
1796 cr1 = old_cr1 = readb(sport->port.membase + UARTCR1); in lpuart_set_termios()
1797 old_cr2 = readb(sport->port.membase + UARTCR2); in lpuart_set_termios()
1798 cr3 = readb(sport->port.membase + UARTCR3); in lpuart_set_termios()
1799 cr4 = readb(sport->port.membase + UARTCR4); in lpuart_set_termios()
1800 bdh = readb(sport->port.membase + UARTBDH); in lpuart_set_termios()
1801 modem = readb(sport->port.membase + UARTMODEM); in lpuart_set_termios()
1833 if (sport->port.rs485.flags & SER_RS485_ENABLED) in lpuart_set_termios()
1877 if (old && sport->lpuart_dma_rx_use) { in lpuart_set_termios()
1878 del_timer_sync(&sport->lpuart_timer); in lpuart_set_termios()
1879 lpuart_dma_rx_free(&sport->port); in lpuart_set_termios()
1882 spin_lock_irqsave(&sport->port.lock, flags); in lpuart_set_termios()
1884 sport->port.read_status_mask = 0; in lpuart_set_termios()
1886 sport->port.read_status_mask |= UARTSR1_FE | UARTSR1_PE; in lpuart_set_termios()
1888 sport->port.read_status_mask |= UARTSR1_FE; in lpuart_set_termios()
1891 sport->port.ignore_status_mask = 0; in lpuart_set_termios()
1893 sport->port.ignore_status_mask |= UARTSR1_PE; in lpuart_set_termios()
1895 sport->port.ignore_status_mask |= UARTSR1_FE; in lpuart_set_termios()
1901 sport->port.ignore_status_mask |= UARTSR1_OR; in lpuart_set_termios()
1908 lpuart_wait_bit_set(&sport->port, UARTSR1, UARTSR1_TC); in lpuart_set_termios()
1912 sport->port.membase + UARTCR2); in lpuart_set_termios()
1914 sbr = sport->port.uartclk / (16 * baud); in lpuart_set_termios()
1915 brfa = ((sport->port.uartclk - (16 * sbr * baud)) * 2) / baud; in lpuart_set_termios()
1920 writeb(cr4 | brfa, sport->port.membase + UARTCR4); in lpuart_set_termios()
1921 writeb(bdh, sport->port.membase + UARTBDH); in lpuart_set_termios()
1922 writeb(sbr & 0xFF, sport->port.membase + UARTBDL); in lpuart_set_termios()
1923 writeb(cr3, sport->port.membase + UARTCR3); in lpuart_set_termios()
1924 writeb(cr1, sport->port.membase + UARTCR1); in lpuart_set_termios()
1925 writeb(modem, sport->port.membase + UARTMODEM); in lpuart_set_termios()
1928 writeb(old_cr2, sport->port.membase + UARTCR2); in lpuart_set_termios()
1930 if (old && sport->lpuart_dma_rx_use) { in lpuart_set_termios()
1931 if (!lpuart_start_rx_dma(sport)) in lpuart_set_termios()
1932 rx_dma_timer_init(sport); in lpuart_set_termios()
1934 sport->lpuart_dma_rx_use = false; in lpuart_set_termios()
1937 spin_unlock_irqrestore(&sport->port.lock, flags); in lpuart_set_termios()
2016 static void lpuart32_serial_setbrg(struct lpuart_port *sport, in lpuart32_serial_setbrg() argument
2019 __lpuart32_serial_setbrg(&sport->port, baudrate, in lpuart32_serial_setbrg()
2020 sport->lpuart_dma_rx_use, in lpuart32_serial_setbrg()
2021 sport->lpuart_dma_tx_use); in lpuart32_serial_setbrg()
2029 struct lpuart_port *sport = container_of(port, struct lpuart_port, port); in lpuart32_set_termios() local
2035 ctrl = old_ctrl = lpuart32_read(&sport->port, UARTCTRL); in lpuart32_set_termios()
2036 modem = lpuart32_read(&sport->port, UARTMODIR); in lpuart32_set_termios()
2068 if (sport->port.rs485.flags & SER_RS485_ENABLED) in lpuart32_set_termios()
2112 if (old && sport->lpuart_dma_rx_use) { in lpuart32_set_termios()
2113 del_timer_sync(&sport->lpuart_timer); in lpuart32_set_termios()
2114 lpuart_dma_rx_free(&sport->port); in lpuart32_set_termios()
2117 spin_lock_irqsave(&sport->port.lock, flags); in lpuart32_set_termios()
2119 sport->port.read_status_mask = 0; in lpuart32_set_termios()
2121 sport->port.read_status_mask |= UARTSTAT_FE | UARTSTAT_PE; in lpuart32_set_termios()
2123 sport->port.read_status_mask |= UARTSTAT_FE; in lpuart32_set_termios()
2126 sport->port.ignore_status_mask = 0; in lpuart32_set_termios()
2128 sport->port.ignore_status_mask |= UARTSTAT_PE; in lpuart32_set_termios()
2130 sport->port.ignore_status_mask |= UARTSTAT_FE; in lpuart32_set_termios()
2136 sport->port.ignore_status_mask |= UARTSTAT_OR; in lpuart32_set_termios()
2143 lpuart32_write(&sport->port, 0, UARTMODIR); in lpuart32_set_termios()
2144 lpuart32_wait_bit_set(&sport->port, UARTSTAT, UARTSTAT_TC); in lpuart32_set_termios()
2147 lpuart32_write(&sport->port, old_ctrl & ~(UARTCTRL_TE | UARTCTRL_RE), in lpuart32_set_termios()
2150 lpuart32_serial_setbrg(sport, baud); in lpuart32_set_termios()
2151 lpuart32_write(&sport->port, modem, UARTMODIR); in lpuart32_set_termios()
2152 lpuart32_write(&sport->port, ctrl, UARTCTRL); in lpuart32_set_termios()
2155 if (old && sport->lpuart_dma_rx_use) { in lpuart32_set_termios()
2156 if (!lpuart_start_rx_dma(sport)) in lpuart32_set_termios()
2157 rx_dma_timer_init(sport); in lpuart32_set_termios()
2159 sport->lpuart_dma_rx_use = false; in lpuart32_set_termios()
2162 spin_unlock_irqrestore(&sport->port.lock, flags); in lpuart32_set_termios()
2272 struct lpuart_port *sport = lpuart_ports[co->index]; in lpuart_console_write() local
2277 if (sport->port.sysrq || oops_in_progress) in lpuart_console_write()
2278 locked = spin_trylock_irqsave(&sport->port.lock, flags); in lpuart_console_write()
2280 spin_lock_irqsave(&sport->port.lock, flags); in lpuart_console_write()
2283 cr2 = old_cr2 = readb(sport->port.membase + UARTCR2); in lpuart_console_write()
2286 writeb(cr2, sport->port.membase + UARTCR2); in lpuart_console_write()
2288 uart_console_write(&sport->port, s, count, lpuart_console_putchar); in lpuart_console_write()
2291 lpuart_wait_bit_set(&sport->port, UARTSR1, UARTSR1_TC); in lpuart_console_write()
2293 writeb(old_cr2, sport->port.membase + UARTCR2); in lpuart_console_write()
2296 spin_unlock_irqrestore(&sport->port.lock, flags); in lpuart_console_write()
2302 struct lpuart_port *sport = lpuart_ports[co->index]; in lpuart32_console_write() local
2307 if (sport->port.sysrq || oops_in_progress) in lpuart32_console_write()
2308 locked = spin_trylock_irqsave(&sport->port.lock, flags); in lpuart32_console_write()
2310 spin_lock_irqsave(&sport->port.lock, flags); in lpuart32_console_write()
2313 cr = old_cr = lpuart32_read(&sport->port, UARTCTRL); in lpuart32_console_write()
2316 lpuart32_write(&sport->port, cr, UARTCTRL); in lpuart32_console_write()
2318 uart_console_write(&sport->port, s, count, lpuart32_console_putchar); in lpuart32_console_write()
2321 lpuart32_wait_bit_set(&sport->port, UARTSTAT, UARTSTAT_TC); in lpuart32_console_write()
2323 lpuart32_write(&sport->port, old_cr, UARTCTRL); in lpuart32_console_write()
2326 spin_unlock_irqrestore(&sport->port.lock, flags); in lpuart32_console_write()
2334 lpuart_console_get_options(struct lpuart_port *sport, int *baud, in lpuart_console_get_options() argument
2340 cr = readb(sport->port.membase + UARTCR2); in lpuart_console_get_options()
2347 cr = readb(sport->port.membase + UARTCR1); in lpuart_console_get_options()
2362 bdh = readb(sport->port.membase + UARTBDH); in lpuart_console_get_options()
2364 bdl = readb(sport->port.membase + UARTBDL); in lpuart_console_get_options()
2368 brfa = readb(sport->port.membase + UARTCR4); in lpuart_console_get_options()
2371 uartclk = lpuart_get_baud_clk_rate(sport); in lpuart_console_get_options()
2378 dev_info(sport->port.dev, "Serial: Console lpuart rounded baud rate" in lpuart_console_get_options()
2383 lpuart32_console_get_options(struct lpuart_port *sport, int *baud, in lpuart32_console_get_options() argument
2389 cr = lpuart32_read(&sport->port, UARTCTRL); in lpuart32_console_get_options()
2396 cr = lpuart32_read(&sport->port, UARTCTRL); in lpuart32_console_get_options()
2411 bd = lpuart32_read(&sport->port, UARTBAUD); in lpuart32_console_get_options()
2417 uartclk = lpuart_get_baud_clk_rate(sport); in lpuart32_console_get_options()
2424 dev_info(sport->port.dev, "Serial: Console lpuart rounded baud rate" in lpuart32_console_get_options()
2430 struct lpuart_port *sport; in lpuart_console_setup() local
2444 sport = lpuart_ports[co->index]; in lpuart_console_setup()
2445 if (sport == NULL) in lpuart_console_setup()
2451 if (lpuart_is_32(sport)) in lpuart_console_setup()
2452 lpuart32_console_get_options(sport, &baud, &parity, &bits); in lpuart_console_setup()
2454 lpuart_console_get_options(sport, &baud, &parity, &bits); in lpuart_console_setup()
2456 if (lpuart_is_32(sport)) in lpuart_console_setup()
2457 lpuart32_setup_watermark(sport); in lpuart_console_setup()
2459 lpuart_setup_watermark(sport); in lpuart_console_setup()
2461 return uart_set_options(&sport->port, co, baud, parity, bits, flow); in lpuart_console_setup()
2587 struct lpuart_port *sport; in lpuart_probe() local
2591 sport = devm_kzalloc(&pdev->dev, sizeof(*sport), GFP_KERNEL); in lpuart_probe()
2592 if (!sport) in lpuart_probe()
2596 sport->port.membase = devm_ioremap_resource(&pdev->dev, res); in lpuart_probe()
2597 if (IS_ERR(sport->port.membase)) in lpuart_probe()
2598 return PTR_ERR(sport->port.membase); in lpuart_probe()
2600 sport->port.membase += sdata->reg_off; in lpuart_probe()
2601 sport->port.mapbase = res->start + sdata->reg_off; in lpuart_probe()
2602 sport->port.dev = &pdev->dev; in lpuart_probe()
2603 sport->port.type = PORT_LPUART; in lpuart_probe()
2604 sport->devtype = sdata->devtype; in lpuart_probe()
2608 sport->port.irq = ret; in lpuart_probe()
2609 sport->port.iotype = sdata->iotype; in lpuart_probe()
2610 if (lpuart_is_32(sport)) in lpuart_probe()
2611 sport->port.ops = &lpuart32_pops; in lpuart_probe()
2613 sport->port.ops = &lpuart_pops; in lpuart_probe()
2614 sport->port.has_sysrq = IS_ENABLED(CONFIG_SERIAL_FSL_LPUART_CONSOLE); in lpuart_probe()
2615 sport->port.flags = UPF_BOOT_AUTOCONF; in lpuart_probe()
2617 if (lpuart_is_32(sport)) in lpuart_probe()
2618 sport->port.rs485_config = lpuart32_config_rs485; in lpuart_probe()
2620 sport->port.rs485_config = lpuart_config_rs485; in lpuart_probe()
2622 sport->ipg_clk = devm_clk_get(&pdev->dev, "ipg"); in lpuart_probe()
2623 if (IS_ERR(sport->ipg_clk)) { in lpuart_probe()
2624 ret = PTR_ERR(sport->ipg_clk); in lpuart_probe()
2629 sport->baud_clk = NULL; in lpuart_probe()
2630 if (is_imx8qxp_lpuart(sport)) { in lpuart_probe()
2631 sport->baud_clk = devm_clk_get(&pdev->dev, "baud"); in lpuart_probe()
2632 if (IS_ERR(sport->baud_clk)) { in lpuart_probe()
2633 ret = PTR_ERR(sport->baud_clk); in lpuart_probe()
2648 sport->port.line = ret; in lpuart_probe()
2650 ret = lpuart_enable_clks(sport); in lpuart_probe()
2653 sport->port.uartclk = lpuart_get_baud_clk_rate(sport); in lpuart_probe()
2655 lpuart_ports[sport->port.line] = sport; in lpuart_probe()
2657 platform_set_drvdata(pdev, &sport->port); in lpuart_probe()
2659 if (lpuart_is_32(sport)) { in lpuart_probe()
2661 ret = devm_request_irq(&pdev->dev, sport->port.irq, lpuart32_int, 0, in lpuart_probe()
2662 DRIVER_NAME, sport); in lpuart_probe()
2665 ret = devm_request_irq(&pdev->dev, sport->port.irq, lpuart_int, 0, in lpuart_probe()
2666 DRIVER_NAME, sport); in lpuart_probe()
2672 ret = uart_get_rs485_mode(&sport->port); in lpuart_probe()
2676 if (sport->port.rs485.flags & SER_RS485_RX_DURING_TX) in lpuart_probe()
2679 if (sport->port.rs485.delay_rts_before_send || in lpuart_probe()
2680 sport->port.rs485.delay_rts_after_send) in lpuart_probe()
2683 ret = uart_add_one_port(&lpuart_reg, &sport->port); in lpuart_probe()
2692 lpuart_disable_clks(sport); in lpuart_probe()
2698 struct lpuart_port *sport = platform_get_drvdata(pdev); in lpuart_remove() local
2700 uart_remove_one_port(&lpuart_reg, &sport->port); in lpuart_remove()
2702 lpuart_disable_clks(sport); in lpuart_remove()
2704 if (sport->dma_tx_chan) in lpuart_remove()
2705 dma_release_channel(sport->dma_tx_chan); in lpuart_remove()
2707 if (sport->dma_rx_chan) in lpuart_remove()
2708 dma_release_channel(sport->dma_rx_chan); in lpuart_remove()
2715 struct lpuart_port *sport = dev_get_drvdata(dev); in lpuart_suspend() local
2719 if (lpuart_is_32(sport)) { in lpuart_suspend()
2721 temp = lpuart32_read(&sport->port, UARTCTRL); in lpuart_suspend()
2723 lpuart32_write(&sport->port, temp, UARTCTRL); in lpuart_suspend()
2726 temp = readb(sport->port.membase + UARTCR2); in lpuart_suspend()
2728 writeb(temp, sport->port.membase + UARTCR2); in lpuart_suspend()
2731 uart_suspend_port(&lpuart_reg, &sport->port); in lpuart_suspend()
2734 irq_wake = irqd_is_wakeup_set(irq_get_irq_data(sport->port.irq)); in lpuart_suspend()
2736 if (sport->lpuart_dma_rx_use) { in lpuart_suspend()
2745 del_timer_sync(&sport->lpuart_timer); in lpuart_suspend()
2746 lpuart_dma_rx_free(&sport->port); in lpuart_suspend()
2750 if (lpuart_is_32(sport)) { in lpuart_suspend()
2751 temp = lpuart32_read(&sport->port, UARTBAUD); in lpuart_suspend()
2752 lpuart32_write(&sport->port, temp & ~UARTBAUD_RDMAE, in lpuart_suspend()
2755 writeb(readb(sport->port.membase + UARTCR5) & in lpuart_suspend()
2756 ~UARTCR5_RDMAS, sport->port.membase + UARTCR5); in lpuart_suspend()
2760 if (sport->lpuart_dma_tx_use) { in lpuart_suspend()
2761 sport->dma_tx_in_progress = false; in lpuart_suspend()
2762 dmaengine_terminate_all(sport->dma_tx_chan); in lpuart_suspend()
2765 if (sport->port.suspended && !irq_wake) in lpuart_suspend()
2766 lpuart_disable_clks(sport); in lpuart_suspend()
2773 struct lpuart_port *sport = dev_get_drvdata(dev); in lpuart_resume() local
2774 bool irq_wake = irqd_is_wakeup_set(irq_get_irq_data(sport->port.irq)); in lpuart_resume()
2776 if (sport->port.suspended && !irq_wake) in lpuart_resume()
2777 lpuart_enable_clks(sport); in lpuart_resume()
2779 if (lpuart_is_32(sport)) in lpuart_resume()
2780 lpuart32_setup_watermark_enable(sport); in lpuart_resume()
2782 lpuart_setup_watermark_enable(sport); in lpuart_resume()
2784 if (sport->lpuart_dma_rx_use) { in lpuart_resume()
2786 if (!lpuart_start_rx_dma(sport)) in lpuart_resume()
2787 rx_dma_timer_init(sport); in lpuart_resume()
2789 sport->lpuart_dma_rx_use = false; in lpuart_resume()
2793 lpuart_tx_dma_startup(sport); in lpuart_resume()
2795 if (lpuart_is_32(sport)) in lpuart_resume()
2796 lpuart32_configure(sport); in lpuart_resume()
2798 uart_resume_port(&lpuart_reg, &sport->port); in lpuart_resume()