Lines Matching refs:membase
329 return readl(port->membase + off); in lpuart32_read()
331 return ioread32be(port->membase + off); in lpuart32_read()
342 writel(val, port->membase + off); in lpuart32_write()
345 iowrite32be(val, port->membase + off); in lpuart32_write()
387 temp = readb(port->membase + UARTCR2); in lpuart_stop_tx()
389 writeb(temp, port->membase + UARTCR2); in lpuart_stop_tx()
405 temp = readb(port->membase + UARTCR2); in lpuart_stop_rx()
406 writeb(temp & ~UARTCR2_RE, port->membase + UARTCR2); in lpuart_stop_rx()
564 val = readb(sport->port.membase + UARTCFIFO); in lpuart_flush_buffer()
566 writeb(val, sport->port.membase + UARTCFIFO); in lpuart_flush_buffer()
573 while (!(readb(port->membase + offset) & bit)) in lpuart_wait_bit_set()
597 writeb(0, sport->port.membase + UARTCR2); in lpuart_poll_init()
599 temp = readb(sport->port.membase + UARTPFIFO); in lpuart_poll_init()
602 sport->port.membase + UARTPFIFO); in lpuart_poll_init()
606 sport->port.membase + UARTCFIFO); in lpuart_poll_init()
609 if (readb(sport->port.membase + UARTSR1) & UARTSR1_RDRF) { in lpuart_poll_init()
610 readb(sport->port.membase + UARTDR); in lpuart_poll_init()
611 writeb(UARTSFIFO_RXUF, sport->port.membase + UARTSFIFO); in lpuart_poll_init()
614 writeb(0, sport->port.membase + UARTTWFIFO); in lpuart_poll_init()
615 writeb(1, sport->port.membase + UARTRWFIFO); in lpuart_poll_init()
618 writeb(UARTCR2_RE | UARTCR2_TE, sport->port.membase + UARTCR2); in lpuart_poll_init()
628 writeb(c, port->membase + UARTDR); in lpuart_poll_put_char()
633 if (!(readb(port->membase + UARTSR1) & UARTSR1_RDRF)) in lpuart_poll_get_char()
636 return readb(port->membase + UARTDR); in lpuart_poll_get_char()
693 writeb(sport->port.x_char, sport->port.membase + UARTDR); in lpuart_transmit_buffer()
705 (readb(sport->port.membase + UARTTCFIFO) < sport->txfifo_size)) { in lpuart_transmit_buffer()
706 writeb(xmit->buf[xmit->tail], sport->port.membase + UARTDR); in lpuart_transmit_buffer()
760 temp = readb(port->membase + UARTCR2); in lpuart_start_tx()
761 writeb(temp | UARTCR2_TIE, port->membase + UARTCR2); in lpuart_start_tx()
767 if (readb(port->membase + UARTSR1) & UARTSR1_TDRE) in lpuart_start_tx()
794 unsigned char sr1 = readb(port->membase + UARTSR1); in lpuart_tx_empty()
795 unsigned char sfifo = readb(port->membase + UARTSFIFO); in lpuart_tx_empty()
840 while (!(readb(sport->port.membase + UARTSFIFO) & UARTSFIFO_RXEMPT)) { in lpuart_rxint()
847 sr = readb(sport->port.membase + UARTSR1); in lpuart_rxint()
848 rx = readb(sport->port.membase + UARTDR); in lpuart_rxint()
892 writeb(UARTCFIFO_RXFLUSH, sport->port.membase + UARTCFIFO); in lpuart_rxint()
893 writeb(UARTSFIFO_RXOF, sport->port.membase + UARTSFIFO); in lpuart_rxint()
975 sts = readb(sport->port.membase + UARTSR1); in lpuart_int()
979 readb(sport->port.membase + UARTDR); in lpuart_int()
982 writeb(UARTCFIFO_RXFLUSH, sport->port.membase + UARTCFIFO); in lpuart_int()
1068 unsigned char sr = readb(sport->port.membase + UARTSR1); in lpuart_copy_rx_to_tty()
1074 cr2 = readb(sport->port.membase + UARTCR2); in lpuart_copy_rx_to_tty()
1076 writeb(cr2, sport->port.membase + UARTCR2); in lpuart_copy_rx_to_tty()
1079 readb(sport->port.membase + UARTDR); in lpuart_copy_rx_to_tty()
1094 if (readb(sport->port.membase + UARTSFIFO) & in lpuart_copy_rx_to_tty()
1097 sport->port.membase + UARTSFIFO); in lpuart_copy_rx_to_tty()
1099 sport->port.membase + UARTCFIFO); in lpuart_copy_rx_to_tty()
1103 writeb(cr2, sport->port.membase + UARTCR2); in lpuart_copy_rx_to_tty()
1267 writeb(readb(sport->port.membase + UARTCR5) | UARTCR5_RDMAS, in lpuart_start_rx_dma()
1268 sport->port.membase + UARTCR5); in lpuart_start_rx_dma()
1295 u8 modem = readb(sport->port.membase + UARTMODEM) & in lpuart_config_rs485()
1297 writeb(modem, sport->port.membase + UARTMODEM); in lpuart_config_rs485()
1336 writeb(modem, sport->port.membase + UARTMODEM); in lpuart_config_rs485()
1396 reg = readb(port->membase + UARTMODEM); in lpuart_get_mctrl()
1419 temp = readb(sport->port.membase + UARTMODEM) & in lpuart_set_mctrl()
1428 writeb(temp, port->membase + UARTMODEM); in lpuart_set_mctrl()
1441 temp = readb(port->membase + UARTCR2) & ~UARTCR2_SBK; in lpuart_break_ctl()
1446 writeb(temp, port->membase + UARTCR2); in lpuart_break_ctl()
1466 cr2 = readb(sport->port.membase + UARTCR2); in lpuart_setup_watermark()
1470 writeb(cr2, sport->port.membase + UARTCR2); in lpuart_setup_watermark()
1472 val = readb(sport->port.membase + UARTPFIFO); in lpuart_setup_watermark()
1474 sport->port.membase + UARTPFIFO); in lpuart_setup_watermark()
1478 sport->port.membase + UARTCFIFO); in lpuart_setup_watermark()
1481 if (readb(sport->port.membase + UARTSR1) & UARTSR1_RDRF) { in lpuart_setup_watermark()
1482 readb(sport->port.membase + UARTDR); in lpuart_setup_watermark()
1483 writeb(UARTSFIFO_RXUF, sport->port.membase + UARTSFIFO); in lpuart_setup_watermark()
1486 writeb(0, sport->port.membase + UARTTWFIFO); in lpuart_setup_watermark()
1487 writeb(1, sport->port.membase + UARTRWFIFO); in lpuart_setup_watermark()
1490 writeb(cr2_saved, sport->port.membase + UARTCR2); in lpuart_setup_watermark()
1499 cr2 = readb(sport->port.membase + UARTCR2); in lpuart_setup_watermark_enable()
1501 writeb(cr2, sport->port.membase + UARTCR2); in lpuart_setup_watermark_enable()
1588 writeb(readb(sport->port.membase + UARTCR5) | in lpuart_tx_dma_startup()
1589 UARTCR5_TDMAS, sport->port.membase + UARTCR5); in lpuart_tx_dma_startup()
1622 cr3 = readb(sport->port.membase + UARTCR3); in lpuart_rx_dma_startup()
1624 writeb(cr3, sport->port.membase + UARTCR3); in lpuart_rx_dma_startup()
1640 temp = readb(sport->port.membase + UARTPFIFO); in lpuart_startup()
1755 temp = readb(port->membase + UARTCR2); in lpuart_shutdown()
1758 writeb(temp, port->membase + UARTCR2); in lpuart_shutdown()
1796 cr1 = old_cr1 = readb(sport->port.membase + UARTCR1); in lpuart_set_termios()
1797 old_cr2 = readb(sport->port.membase + UARTCR2); in lpuart_set_termios()
1798 cr3 = readb(sport->port.membase + UARTCR3); in lpuart_set_termios()
1799 cr4 = readb(sport->port.membase + UARTCR4); in lpuart_set_termios()
1800 bdh = readb(sport->port.membase + UARTBDH); in lpuart_set_termios()
1801 modem = readb(sport->port.membase + UARTMODEM); in lpuart_set_termios()
1912 sport->port.membase + UARTCR2); in lpuart_set_termios()
1920 writeb(cr4 | brfa, sport->port.membase + UARTCR4); in lpuart_set_termios()
1921 writeb(bdh, sport->port.membase + UARTBDH); in lpuart_set_termios()
1922 writeb(sbr & 0xFF, sport->port.membase + UARTBDL); in lpuart_set_termios()
1923 writeb(cr3, sport->port.membase + UARTCR3); in lpuart_set_termios()
1924 writeb(cr1, sport->port.membase + UARTCR1); in lpuart_set_termios()
1925 writeb(modem, sport->port.membase + UARTMODEM); in lpuart_set_termios()
1928 writeb(old_cr2, sport->port.membase + UARTCR2); in lpuart_set_termios()
2260 writeb(ch, port->membase + UARTDR); in lpuart_console_putchar()
2283 cr2 = old_cr2 = readb(sport->port.membase + UARTCR2); in lpuart_console_write()
2286 writeb(cr2, sport->port.membase + UARTCR2); in lpuart_console_write()
2293 writeb(old_cr2, sport->port.membase + UARTCR2); in lpuart_console_write()
2340 cr = readb(sport->port.membase + UARTCR2); in lpuart_console_get_options()
2347 cr = readb(sport->port.membase + UARTCR1); in lpuart_console_get_options()
2362 bdh = readb(sport->port.membase + UARTBDH); in lpuart_console_get_options()
2364 bdl = readb(sport->port.membase + UARTBDL); in lpuart_console_get_options()
2368 brfa = readb(sport->port.membase + UARTCR4); in lpuart_console_get_options()
2502 if (!device->port.membase) in lpuart_early_console_setup()
2512 if (!device->port.membase) in lpuart32_early_console_setup()
2527 if (!device->port.membase) in ls1028a_early_console_setup()
2549 if (!device->port.membase) in lpuart32_imx_early_console_setup()
2553 device->port.membase += IMX_REG_OFF; in lpuart32_imx_early_console_setup()
2596 sport->port.membase = devm_ioremap_resource(&pdev->dev, res); in lpuart_probe()
2597 if (IS_ERR(sport->port.membase)) in lpuart_probe()
2598 return PTR_ERR(sport->port.membase); in lpuart_probe()
2600 sport->port.membase += sdata->reg_off; in lpuart_probe()
2726 temp = readb(sport->port.membase + UARTCR2); in lpuart_suspend()
2728 writeb(temp, sport->port.membase + UARTCR2); in lpuart_suspend()
2755 writeb(readb(sport->port.membase + UARTCR5) & in lpuart_suspend()
2756 ~UARTCR5_RDMAS, sport->port.membase + UARTCR5); in lpuart_suspend()