42 	int ret;  in tb_switch_tmu_ucap_supported()  local
45 	ret = tb_sw_read(sw, &val, TB_CFG_SWITCH,  in tb_switch_tmu_ucap_supported()
47 	if (ret)  in tb_switch_tmu_ucap_supported()
55 	int ret;  in tb_switch_tmu_rate_read()  local
58 	ret = tb_sw_read(sw, &val, TB_CFG_SWITCH,  in tb_switch_tmu_rate_read()
60 	if (ret)  in tb_switch_tmu_rate_read()
61 		return ret;  in tb_switch_tmu_rate_read()
69 	int ret;  in tb_switch_tmu_rate_write()  local
72 	ret = tb_sw_read(sw, &val, TB_CFG_SWITCH,  in tb_switch_tmu_rate_write()
74 	if (ret)  in tb_switch_tmu_rate_write()
75 		return ret;  in tb_switch_tmu_rate_write()
88 	int ret;  in tb_port_tmu_write()  local
90 	ret = tb_port_read(port, &data, TB_CFG_PORT, port->cap_tmu + offset, 1);  in tb_port_tmu_write()
91 	if (ret)  in tb_port_tmu_write()
92 		return ret;  in tb_port_tmu_write()
120 	int ret;  in tb_port_tmu_is_unidirectional()  local
123 	ret = tb_port_read(port, &val, TB_CFG_PORT,  in tb_port_tmu_is_unidirectional()
125 	if (ret)  in tb_port_tmu_is_unidirectional()
133 	int ret;  in tb_switch_tmu_set_time_disruption()  local
136 	ret = tb_sw_read(sw, &val, TB_CFG_SWITCH,  in tb_switch_tmu_set_time_disruption()
138 	if (ret)  in tb_switch_tmu_set_time_disruption()
139 		return ret;  in tb_switch_tmu_set_time_disruption()
161 	int ret;  in tb_switch_tmu_init()  local
166 	ret = tb_switch_find_cap(sw, TB_SWITCH_CAP_TMU);  in tb_switch_tmu_init()
167 	if (ret > 0)  in tb_switch_tmu_init()
168 		sw->tmu.cap = ret;  in tb_switch_tmu_init()
178 	ret = tb_switch_tmu_rate_read(sw);  in tb_switch_tmu_init()
179 	if (ret < 0)  in tb_switch_tmu_init()
180 		return ret;  in tb_switch_tmu_init()
182 	sw->tmu.rate = ret;  in tb_switch_tmu_init()
213 	int i, ret, retries = 100;  in tb_switch_tmu_post_time()  local
226 	ret = tb_sw_read(root_switch, gm_local_time, TB_CFG_SWITCH,  in tb_switch_tmu_post_time()
229 	if (ret)  in tb_switch_tmu_post_time()
230 		return ret;  in tb_switch_tmu_post_time()
244 	ret = tb_switch_tmu_set_time_disruption(sw, true);  in tb_switch_tmu_post_time()
245 	if (ret)  in tb_switch_tmu_post_time()
246 		return ret;  in tb_switch_tmu_post_time()
255 	ret = tb_sw_write(sw, &local_time, TB_CFG_SWITCH,  in tb_switch_tmu_post_time()
257 	if (ret)  in tb_switch_tmu_post_time()
268 	ret = tb_sw_write(sw, &post_time, TB_CFG_SWITCH, post_time_offset, 2);  in tb_switch_tmu_post_time()
269 	if (ret)  in tb_switch_tmu_post_time()
274 		ret = tb_sw_read(sw, &post_time, TB_CFG_SWITCH,  in tb_switch_tmu_post_time()
276 		if (ret)  in tb_switch_tmu_post_time()
281 		ret = -ETIMEDOUT;  in tb_switch_tmu_post_time()
289 	return ret;  in tb_switch_tmu_post_time()
300 	int ret;  in tb_switch_tmu_disable()  local
318 		ret = tb_port_tmu_unidirectional_disable(down);  in tb_switch_tmu_disable()
319 		if (ret)  in tb_switch_tmu_disable()
320 			return ret;  in tb_switch_tmu_disable()
341 	int ret;  in tb_switch_tmu_enable()  local
349 	ret = tb_switch_tmu_set_time_disruption(sw, true);  in tb_switch_tmu_enable()
350 	if (ret)  in tb_switch_tmu_enable()
351 		return ret;  in tb_switch_tmu_enable()
361 		ret = tb_port_tmu_unidirectional_disable(down);  in tb_switch_tmu_enable()
362 		if (ret)  in tb_switch_tmu_enable()
363 			return ret;  in tb_switch_tmu_enable()
365 		ret = tb_switch_tmu_rate_write(sw, TB_SWITCH_TMU_RATE_HIFI);  in tb_switch_tmu_enable()
366 		if (ret)  in tb_switch_tmu_enable()
367 			return ret;  in tb_switch_tmu_enable()
369 		ret = tb_port_tmu_unidirectional_disable(up);  in tb_switch_tmu_enable()
370 		if (ret)  in tb_switch_tmu_enable()
371 			return ret;  in tb_switch_tmu_enable()
373 		ret = tb_switch_tmu_rate_write(sw, TB_SWITCH_TMU_RATE_HIFI);  in tb_switch_tmu_enable()
374 		if (ret)  in tb_switch_tmu_enable()
375 			return ret;  in tb_switch_tmu_enable()