Lines Matching refs:hw_id
195 static void tsens_set_interrupt_v1(struct tsens_priv *priv, u32 hw_id, in tsens_set_interrupt_v1() argument
202 index = UP_INT_CLEAR_0 + hw_id; in tsens_set_interrupt_v1()
205 index = LOW_INT_CLEAR_0 + hw_id; in tsens_set_interrupt_v1()
214 static void tsens_set_interrupt_v2(struct tsens_priv *priv, u32 hw_id, in tsens_set_interrupt_v2() argument
228 index_mask = UP_INT_MASK_0 + hw_id; in tsens_set_interrupt_v2()
229 index_clear = UP_INT_CLEAR_0 + hw_id; in tsens_set_interrupt_v2()
232 index_mask = LOW_INT_MASK_0 + hw_id; in tsens_set_interrupt_v2()
233 index_clear = LOW_INT_CLEAR_0 + hw_id; in tsens_set_interrupt_v2()
236 index_mask = CRIT_INT_MASK_0 + hw_id; in tsens_set_interrupt_v2()
237 index_clear = CRIT_INT_CLEAR_0 + hw_id; in tsens_set_interrupt_v2()
261 static void tsens_set_interrupt(struct tsens_priv *priv, u32 hw_id, in tsens_set_interrupt() argument
264 dev_dbg(priv->dev, "[%u] %s: %s -> %s\n", hw_id, __func__, in tsens_set_interrupt()
268 tsens_set_interrupt_v2(priv, hw_id, irq_type, enable); in tsens_set_interrupt()
270 tsens_set_interrupt_v1(priv, hw_id, irq_type, enable); in tsens_set_interrupt()
282 static int tsens_threshold_violated(struct tsens_priv *priv, u32 hw_id, in tsens_threshold_violated() argument
287 ret = regmap_field_read(priv->rf[UPPER_STATUS_0 + hw_id], &d->up_viol); in tsens_threshold_violated()
290 ret = regmap_field_read(priv->rf[LOWER_STATUS_0 + hw_id], &d->low_viol); in tsens_threshold_violated()
295 ret = regmap_field_read(priv->rf[CRITICAL_STATUS_0 + hw_id], in tsens_threshold_violated()
307 static int tsens_read_irq_state(struct tsens_priv *priv, u32 hw_id, in tsens_read_irq_state() argument
313 ret = regmap_field_read(priv->rf[UP_INT_CLEAR_0 + hw_id], &d->up_irq_clear); in tsens_read_irq_state()
316 ret = regmap_field_read(priv->rf[LOW_INT_CLEAR_0 + hw_id], &d->low_irq_clear); in tsens_read_irq_state()
320 ret = regmap_field_read(priv->rf[UP_INT_MASK_0 + hw_id], &d->up_irq_mask); in tsens_read_irq_state()
323 ret = regmap_field_read(priv->rf[LOW_INT_MASK_0 + hw_id], &d->low_irq_mask); in tsens_read_irq_state()
326 ret = regmap_field_read(priv->rf[CRIT_INT_CLEAR_0 + hw_id], in tsens_read_irq_state()
330 ret = regmap_field_read(priv->rf[CRIT_INT_MASK_0 + hw_id], in tsens_read_irq_state()
335 d->crit_thresh = tsens_hw_to_mC(s, CRIT_THRESH_0 + hw_id); in tsens_read_irq_state()
345 d->up_thresh = tsens_hw_to_mC(s, UP_THRESH_0 + hw_id); in tsens_read_irq_state()
346 d->low_thresh = tsens_hw_to_mC(s, LOW_THRESH_0 + hw_id); in tsens_read_irq_state()
349 hw_id, __func__, in tsens_read_irq_state()
354 dev_dbg(priv->dev, "[%u] %s%s: thresh: (%d:%d:%d)\n", hw_id, __func__, in tsens_read_irq_state()
361 static inline u32 masked_irq(u32 hw_id, u32 mask, enum tsens_ver ver) in masked_irq() argument
364 return mask & (1 << hw_id); in masked_irq()
416 u32 hw_id = s->hw_id; in tsens_critical_irq_thread() local
420 if (!tsens_threshold_violated(priv, hw_id, &d)) in tsens_critical_irq_thread()
425 hw_id, __func__); in tsens_critical_irq_thread()
429 tsens_read_irq_state(priv, hw_id, s, &d); in tsens_critical_irq_thread()
431 !masked_irq(hw_id, d.crit_irq_mask, tsens_version(priv))) { in tsens_critical_irq_thread()
433 tsens_set_interrupt(priv, hw_id, CRITICAL, false); in tsens_critical_irq_thread()
466 u32 hw_id = s->hw_id; in tsens_irq_thread() local
470 if (!tsens_threshold_violated(priv, hw_id, &d)) in tsens_irq_thread()
475 hw_id, __func__); in tsens_irq_thread()
481 tsens_read_irq_state(priv, hw_id, s, &d); in tsens_irq_thread()
484 !masked_irq(hw_id, d.up_irq_mask, tsens_version(priv))) { in tsens_irq_thread()
485 tsens_set_interrupt(priv, hw_id, UPPER, disable); in tsens_irq_thread()
488 hw_id, __func__); in tsens_irq_thread()
489 tsens_set_interrupt(priv, hw_id, UPPER, enable); in tsens_irq_thread()
495 !masked_irq(hw_id, d.low_irq_mask, tsens_version(priv))) { in tsens_irq_thread()
496 tsens_set_interrupt(priv, hw_id, LOWER, disable); in tsens_irq_thread()
499 hw_id, __func__); in tsens_irq_thread()
500 tsens_set_interrupt(priv, hw_id, LOWER, enable); in tsens_irq_thread()
511 hw_id, __func__, temp); in tsens_irq_thread()
516 hw_id, __func__, temp); in tsens_irq_thread()
531 u32 hw_id = s->hw_id; in tsens_set_trips() local
534 hw_id, __func__, low, high); in tsens_set_trips()
544 tsens_read_irq_state(priv, hw_id, s, &d); in tsens_set_trips()
547 regmap_field_write(priv->rf[LOW_THRESH_0 + hw_id], low_val); in tsens_set_trips()
548 regmap_field_write(priv->rf[UP_THRESH_0 + hw_id], high_val); in tsens_set_trips()
549 tsens_set_interrupt(priv, hw_id, LOWER, true); in tsens_set_trips()
550 tsens_set_interrupt(priv, hw_id, UPPER, true); in tsens_set_trips()
555 hw_id, __func__, d.low_thresh, d.up_thresh, cl_low, cl_high); in tsens_set_trips()
581 int hw_id = s->hw_id; in get_temp_tsens_valid() local
582 u32 temp_idx = LAST_TEMP_0 + hw_id; in get_temp_tsens_valid()
583 u32 valid_idx = VALID_0 + hw_id; in get_temp_tsens_valid()
610 int hw_id = s->hw_id; in get_temp_common() local
613 ret = regmap_field_read(priv->rf[LAST_TEMP_0 + hw_id], &last_temp); in get_temp_common()
634 seq_printf(s, "%8d %8d %8d\n", priv->sensor[i].hw_id, in dbg_sensors_show()
970 tzd = devm_thermal_zone_of_sensor_register(priv->dev, priv->sensor[i].hw_id, in tsens_register()
1035 priv->sensor[i].hw_id = data->hw_ids[i]; in tsens_probe()
1037 priv->sensor[i].hw_id = i; in tsens_probe()