Lines Matching refs:xqspi
149 static inline u32 zynq_qspi_read(struct zynq_qspi *xqspi, u32 offset) in zynq_qspi_read() argument
151 return readl_relaxed(xqspi->regs + offset); in zynq_qspi_read()
154 static inline void zynq_qspi_write(struct zynq_qspi *xqspi, u32 offset, in zynq_qspi_write() argument
157 writel_relaxed(val, xqspi->regs + offset); in zynq_qspi_write()
181 static void zynq_qspi_init_hw(struct zynq_qspi *xqspi, unsigned int num_cs) in zynq_qspi_init_hw() argument
185 zynq_qspi_write(xqspi, ZYNQ_QSPI_ENABLE_OFFSET, 0); in zynq_qspi_init_hw()
186 zynq_qspi_write(xqspi, ZYNQ_QSPI_IDIS_OFFSET, ZYNQ_QSPI_IXR_ALL_MASK); in zynq_qspi_init_hw()
194 zynq_qspi_write(xqspi, ZYNQ_QSPI_LINEAR_CFG_OFFSET, config_reg); in zynq_qspi_init_hw()
197 while (zynq_qspi_read(xqspi, ZYNQ_QSPI_STATUS_OFFSET) & in zynq_qspi_init_hw()
199 zynq_qspi_read(xqspi, ZYNQ_QSPI_RXD_OFFSET); in zynq_qspi_init_hw()
201 zynq_qspi_write(xqspi, ZYNQ_QSPI_STATUS_OFFSET, ZYNQ_QSPI_IXR_ALL_MASK); in zynq_qspi_init_hw()
202 config_reg = zynq_qspi_read(xqspi, ZYNQ_QSPI_CONFIG_OFFSET); in zynq_qspi_init_hw()
214 zynq_qspi_write(xqspi, ZYNQ_QSPI_CONFIG_OFFSET, config_reg); in zynq_qspi_init_hw()
216 zynq_qspi_write(xqspi, ZYNQ_QSPI_RX_THRESH_OFFSET, in zynq_qspi_init_hw()
218 zynq_qspi_write(xqspi, ZYNQ_QSPI_TX_THRESH_OFFSET, in zynq_qspi_init_hw()
221 zynq_qspi_write(xqspi, ZYNQ_QSPI_ENABLE_OFFSET, in zynq_qspi_init_hw()
245 static void zynq_qspi_rxfifo_op(struct zynq_qspi *xqspi, unsigned int size) in zynq_qspi_rxfifo_op() argument
249 data = zynq_qspi_read(xqspi, ZYNQ_QSPI_RXD_OFFSET); in zynq_qspi_rxfifo_op()
251 if (xqspi->rxbuf) { in zynq_qspi_rxfifo_op()
252 memcpy(xqspi->rxbuf, ((u8 *)&data) + 4 - size, size); in zynq_qspi_rxfifo_op()
253 xqspi->rxbuf += size; in zynq_qspi_rxfifo_op()
256 xqspi->rx_bytes -= size; in zynq_qspi_rxfifo_op()
257 if (xqspi->rx_bytes < 0) in zynq_qspi_rxfifo_op()
258 xqspi->rx_bytes = 0; in zynq_qspi_rxfifo_op()
266 static void zynq_qspi_txfifo_op(struct zynq_qspi *xqspi, unsigned int size) in zynq_qspi_txfifo_op() argument
273 if (xqspi->txbuf) { in zynq_qspi_txfifo_op()
275 memcpy(&data, xqspi->txbuf, size); in zynq_qspi_txfifo_op()
276 xqspi->txbuf += size; in zynq_qspi_txfifo_op()
281 xqspi->tx_bytes -= size; in zynq_qspi_txfifo_op()
282 zynq_qspi_write(xqspi, offset[size - 1], data); in zynq_qspi_txfifo_op()
293 struct zynq_qspi *xqspi = spi_controller_get_devdata(ctlr); in zynq_qspi_chipselect() local
298 config_reg = zynq_qspi_read(xqspi, ZYNQ_QSPI_LINEAR_CFG_OFFSET); in zynq_qspi_chipselect()
304 zynq_qspi_write(xqspi, ZYNQ_QSPI_LINEAR_CFG_OFFSET, config_reg); in zynq_qspi_chipselect()
308 config_reg = zynq_qspi_read(xqspi, ZYNQ_QSPI_CONFIG_OFFSET); in zynq_qspi_chipselect()
314 zynq_qspi_write(xqspi, ZYNQ_QSPI_CONFIG_OFFSET, config_reg); in zynq_qspi_chipselect()
334 static int zynq_qspi_config_op(struct zynq_qspi *xqspi, struct spi_device *spi) in zynq_qspi_config_op() argument
348 (clk_get_rate(xqspi->refclk) / (2 << baud_rate_val)) > in zynq_qspi_config_op()
352 config_reg = zynq_qspi_read(xqspi, ZYNQ_QSPI_CONFIG_OFFSET); in zynq_qspi_config_op()
364 zynq_qspi_write(xqspi, ZYNQ_QSPI_CONFIG_OFFSET, config_reg); in zynq_qspi_config_op()
400 static void zynq_qspi_write_op(struct zynq_qspi *xqspi, int txcount, in zynq_qspi_write_op() argument
405 len = xqspi->tx_bytes; in zynq_qspi_write_op()
412 zynq_qspi_txfifo_op(xqspi, len); in zynq_qspi_write_op()
421 if (xqspi->txbuf) { in zynq_qspi_write_op()
422 iowrite32_rep(xqspi->regs + ZYNQ_QSPI_TXD_00_00_OFFSET, in zynq_qspi_write_op()
423 xqspi->txbuf, count); in zynq_qspi_write_op()
424 xqspi->txbuf += count * 4; in zynq_qspi_write_op()
427 writel_relaxed(0, xqspi->regs + in zynq_qspi_write_op()
431 xqspi->tx_bytes -= count * 4; in zynq_qspi_write_op()
439 static void zynq_qspi_read_op(struct zynq_qspi *xqspi, int rxcount) in zynq_qspi_read_op() argument
443 len = xqspi->rx_bytes - xqspi->tx_bytes; in zynq_qspi_read_op()
447 if (xqspi->rxbuf) { in zynq_qspi_read_op()
448 ioread32_rep(xqspi->regs + ZYNQ_QSPI_RXD_OFFSET, in zynq_qspi_read_op()
449 xqspi->rxbuf, count); in zynq_qspi_read_op()
450 xqspi->rxbuf += count * 4; in zynq_qspi_read_op()
453 readl_relaxed(xqspi->regs + ZYNQ_QSPI_RXD_OFFSET); in zynq_qspi_read_op()
455 xqspi->rx_bytes -= count * 4; in zynq_qspi_read_op()
459 zynq_qspi_rxfifo_op(xqspi, len); in zynq_qspi_read_op()
477 struct zynq_qspi *xqspi = (struct zynq_qspi *)dev_id; in zynq_qspi_irq() local
479 intr_status = zynq_qspi_read(xqspi, ZYNQ_QSPI_STATUS_OFFSET); in zynq_qspi_irq()
480 zynq_qspi_write(xqspi, ZYNQ_QSPI_STATUS_OFFSET, intr_status); in zynq_qspi_irq()
491 zynq_qspi_read_op(xqspi, ZYNQ_QSPI_RX_THRESHOLD); in zynq_qspi_irq()
492 if (xqspi->tx_bytes) { in zynq_qspi_irq()
494 zynq_qspi_write_op(xqspi, ZYNQ_QSPI_RX_THRESHOLD, in zynq_qspi_irq()
501 if (!xqspi->rx_bytes) { in zynq_qspi_irq()
502 zynq_qspi_write(xqspi, in zynq_qspi_irq()
505 complete(&xqspi->data_completion); in zynq_qspi_irq()
528 struct zynq_qspi *xqspi = spi_controller_get_devdata(mem->spi->master); in zynq_qspi_exec_mem_op() local
532 dev_dbg(xqspi->dev, "cmd:%#x mode:%d.%d.%d.%d\n", in zynq_qspi_exec_mem_op()
537 zynq_qspi_config_op(xqspi, mem->spi); in zynq_qspi_exec_mem_op()
540 reinit_completion(&xqspi->data_completion); in zynq_qspi_exec_mem_op()
541 xqspi->txbuf = (u8 *)&op->cmd.opcode; in zynq_qspi_exec_mem_op()
542 xqspi->rxbuf = NULL; in zynq_qspi_exec_mem_op()
543 xqspi->tx_bytes = op->cmd.nbytes; in zynq_qspi_exec_mem_op()
544 xqspi->rx_bytes = op->cmd.nbytes; in zynq_qspi_exec_mem_op()
545 zynq_qspi_write_op(xqspi, ZYNQ_QSPI_FIFO_DEPTH, true); in zynq_qspi_exec_mem_op()
546 zynq_qspi_write(xqspi, ZYNQ_QSPI_IEN_OFFSET, in zynq_qspi_exec_mem_op()
548 if (!wait_for_completion_timeout(&xqspi->data_completion, in zynq_qspi_exec_mem_op()
555 xqspi->txbuf[i] = op->addr.val >> in zynq_qspi_exec_mem_op()
559 reinit_completion(&xqspi->data_completion); in zynq_qspi_exec_mem_op()
560 xqspi->rxbuf = NULL; in zynq_qspi_exec_mem_op()
561 xqspi->tx_bytes = op->addr.nbytes; in zynq_qspi_exec_mem_op()
562 xqspi->rx_bytes = op->addr.nbytes; in zynq_qspi_exec_mem_op()
563 zynq_qspi_write_op(xqspi, ZYNQ_QSPI_FIFO_DEPTH, true); in zynq_qspi_exec_mem_op()
564 zynq_qspi_write(xqspi, ZYNQ_QSPI_IEN_OFFSET, in zynq_qspi_exec_mem_op()
566 if (!wait_for_completion_timeout(&xqspi->data_completion, in zynq_qspi_exec_mem_op()
577 reinit_completion(&xqspi->data_completion); in zynq_qspi_exec_mem_op()
578 xqspi->txbuf = tmpbuf; in zynq_qspi_exec_mem_op()
579 xqspi->rxbuf = NULL; in zynq_qspi_exec_mem_op()
580 xqspi->tx_bytes = op->dummy.nbytes; in zynq_qspi_exec_mem_op()
581 xqspi->rx_bytes = op->dummy.nbytes; in zynq_qspi_exec_mem_op()
582 zynq_qspi_write_op(xqspi, ZYNQ_QSPI_FIFO_DEPTH, true); in zynq_qspi_exec_mem_op()
583 zynq_qspi_write(xqspi, ZYNQ_QSPI_IEN_OFFSET, in zynq_qspi_exec_mem_op()
585 if (!wait_for_completion_timeout(&xqspi->data_completion, in zynq_qspi_exec_mem_op()
593 reinit_completion(&xqspi->data_completion); in zynq_qspi_exec_mem_op()
595 xqspi->txbuf = (u8 *)op->data.buf.out; in zynq_qspi_exec_mem_op()
596 xqspi->tx_bytes = op->data.nbytes; in zynq_qspi_exec_mem_op()
597 xqspi->rxbuf = NULL; in zynq_qspi_exec_mem_op()
598 xqspi->rx_bytes = op->data.nbytes; in zynq_qspi_exec_mem_op()
600 xqspi->txbuf = NULL; in zynq_qspi_exec_mem_op()
601 xqspi->rxbuf = (u8 *)op->data.buf.in; in zynq_qspi_exec_mem_op()
602 xqspi->rx_bytes = op->data.nbytes; in zynq_qspi_exec_mem_op()
603 xqspi->tx_bytes = op->data.nbytes; in zynq_qspi_exec_mem_op()
606 zynq_qspi_write_op(xqspi, ZYNQ_QSPI_FIFO_DEPTH, true); in zynq_qspi_exec_mem_op()
607 zynq_qspi_write(xqspi, ZYNQ_QSPI_IEN_OFFSET, in zynq_qspi_exec_mem_op()
609 if (!wait_for_completion_timeout(&xqspi->data_completion, in zynq_qspi_exec_mem_op()
637 struct zynq_qspi *xqspi; in zynq_qspi_probe() local
640 ctlr = spi_alloc_master(&pdev->dev, sizeof(*xqspi)); in zynq_qspi_probe()
644 xqspi = spi_controller_get_devdata(ctlr); in zynq_qspi_probe()
645 xqspi->dev = dev; in zynq_qspi_probe()
646 platform_set_drvdata(pdev, xqspi); in zynq_qspi_probe()
647 xqspi->regs = devm_platform_ioremap_resource(pdev, 0); in zynq_qspi_probe()
648 if (IS_ERR(xqspi->regs)) { in zynq_qspi_probe()
649 ret = PTR_ERR(xqspi->regs); in zynq_qspi_probe()
653 xqspi->pclk = devm_clk_get(&pdev->dev, "pclk"); in zynq_qspi_probe()
654 if (IS_ERR(xqspi->pclk)) { in zynq_qspi_probe()
656 ret = PTR_ERR(xqspi->pclk); in zynq_qspi_probe()
660 init_completion(&xqspi->data_completion); in zynq_qspi_probe()
662 xqspi->refclk = devm_clk_get(&pdev->dev, "ref_clk"); in zynq_qspi_probe()
663 if (IS_ERR(xqspi->refclk)) { in zynq_qspi_probe()
665 ret = PTR_ERR(xqspi->refclk); in zynq_qspi_probe()
669 ret = clk_prepare_enable(xqspi->pclk); in zynq_qspi_probe()
675 ret = clk_prepare_enable(xqspi->refclk); in zynq_qspi_probe()
681 xqspi->irq = platform_get_irq(pdev, 0); in zynq_qspi_probe()
682 if (xqspi->irq <= 0) { in zynq_qspi_probe()
686 ret = devm_request_irq(&pdev->dev, xqspi->irq, zynq_qspi_irq, in zynq_qspi_probe()
687 0, pdev->name, xqspi); in zynq_qspi_probe()
710 ctlr->max_speed_hz = clk_get_rate(xqspi->refclk) / 2; in zynq_qspi_probe()
714 zynq_qspi_init_hw(xqspi, ctlr->num_chipselect); in zynq_qspi_probe()
725 clk_disable_unprepare(xqspi->refclk); in zynq_qspi_probe()
727 clk_disable_unprepare(xqspi->pclk); in zynq_qspi_probe()
746 struct zynq_qspi *xqspi = platform_get_drvdata(pdev); in zynq_qspi_remove() local
748 zynq_qspi_write(xqspi, ZYNQ_QSPI_ENABLE_OFFSET, 0); in zynq_qspi_remove()
750 clk_disable_unprepare(xqspi->refclk); in zynq_qspi_remove()
751 clk_disable_unprepare(xqspi->pclk); in zynq_qspi_remove()