227 static inline u32 tegra_spi_readl(struct tegra_spi_data *tspi,  in tegra_spi_readl()  function
248 	val = tegra_spi_readl(tspi, SPI_TRANS_STATUS);  in tegra_spi_clear_status()
252 	val = tegra_spi_readl(tspi, SPI_FIFO_STATUS);  in tegra_spi_clear_status()
304 	fifo_status = tegra_spi_readl(tspi, SPI_FIFO_STATUS);  in tegra_spi_fill_tx_fifo_from_client_txbuf()
354 	fifo_status = tegra_spi_readl(tspi, SPI_FIFO_STATUS);  in tegra_spi_read_rx_fifo_to_client_rxbuf()
359 			u32 x = tegra_spi_readl(tspi, SPI_RX_FIFO);  in tegra_spi_read_rx_fifo_to_client_rxbuf()
376 			u32 x = tegra_spi_readl(tspi, SPI_RX_FIFO) & rx_mask;  in tegra_spi_read_rx_fifo_to_client_rxbuf()
516 	status = tegra_spi_readl(tspi, SPI_FIFO_STATUS);  in tegra_spi_flush_fifos()
521 			status = tegra_spi_readl(tspi, SPI_FIFO_STATUS);  in tegra_spi_flush_fifos()
977 		val = tegra_spi_readl(tspi, SPI_INTR_MASK);  in tegra_spi_setup()
1024 		tegra_spi_readl(tspi, SPI_COMMAND1),  in tegra_spi_dump_regs()
1025 		tegra_spi_readl(tspi, SPI_COMMAND2));  in tegra_spi_dump_regs()
1027 		tegra_spi_readl(tspi, SPI_DMA_CTL),  in tegra_spi_dump_regs()
1028 		tegra_spi_readl(tspi, SPI_DMA_BLK));  in tegra_spi_dump_regs()
1030 		tegra_spi_readl(tspi, SPI_TRANS_STATUS),  in tegra_spi_dump_regs()
1031 		tegra_spi_readl(tspi, SPI_FIFO_STATUS));  in tegra_spi_dump_regs()
1261 	tspi->status_reg = tegra_spi_readl(tspi, SPI_FIFO_STATUS);  in tegra_spi_isr()
1410 	tspi->spi_cs_timing1 = tegra_spi_readl(tspi, SPI_CS_TIMING1);  in tegra_spi_probe()
1411 	tspi->spi_cs_timing2 = tegra_spi_readl(tspi, SPI_CS_TIMING2);  in tegra_spi_probe()
1412 	tspi->def_command2_reg = tegra_spi_readl(tspi, SPI_COMMAND2);  in tegra_spi_probe()
1501 	tegra_spi_readl(tspi, SPI_COMMAND1);  in tegra_spi_runtime_suspend()