Lines Matching refs:cr0
620 u32 cr0 = CR0_FRF_SPI << CR0_FRF_OFFSET in rockchip_spi_config() local
628 cr0 |= CR0_OPM_SLAVE << CR0_OPM_OFFSET; in rockchip_spi_config()
631 cr0 |= rs->rsd << CR0_RSD_OFFSET; in rockchip_spi_config()
632 cr0 |= rs->csm << CR0_CSM_OFFSET; in rockchip_spi_config()
633 cr0 |= (spi->mode & 0x3U) << CR0_SCPH_OFFSET; in rockchip_spi_config()
635 cr0 |= CR0_FBM_LSB << CR0_FBM_OFFSET; in rockchip_spi_config()
637 cr0 |= BIT(spi->chip_select) << CR0_SOI_OFFSET; in rockchip_spi_config()
640 cr0 |= CR0_XFM_TR << CR0_XFM_OFFSET; in rockchip_spi_config()
642 cr0 |= CR0_XFM_RO << CR0_XFM_OFFSET; in rockchip_spi_config()
649 cr0 |= CR0_XFM_TR << CR0_XFM_OFFSET; in rockchip_spi_config()
651 cr0 |= CR0_XFM_TO << CR0_XFM_OFFSET; in rockchip_spi_config()
659 cr0 |= CR0_DFS_4BIT << CR0_DFS_OFFSET; in rockchip_spi_config()
663 cr0 |= CR0_DFS_8BIT << CR0_DFS_OFFSET; in rockchip_spi_config()
667 cr0 |= CR0_DFS_16BIT << CR0_DFS_OFFSET; in rockchip_spi_config()
700 writel_relaxed(cr0, rs->regs + ROCKCHIP_SPI_CTRLR0); in rockchip_spi_config()
895 u32 cr0; in rockchip_spi_setup() local
904 cr0 = readl_relaxed(rs->regs + ROCKCHIP_SPI_CTRLR0); in rockchip_spi_setup()
906 cr0 |= ((spi->mode & 0x3) << CR0_SCPH_OFFSET); in rockchip_spi_setup()
908 cr0 |= BIT(spi->chip_select) << CR0_SOI_OFFSET; in rockchip_spi_setup()
910 writel_relaxed(cr0, rs->regs + ROCKCHIP_SPI_CTRLR0); in rockchip_spi_setup()